Bond Pad Layer for Chip ID Programming

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Solution Overview

Problem

Existing integrated circuit (IC) structures require complex and costly updates to metal and via layer masks for changing chip function identification codes, even if the underlying structure remains unchanged, due to the need for selective connection of metal links across multiple layers.

Innovation Solution

The IC structure incorporates a bond pad layer with pins connected to higher and lower voltage power supply rails, allowing for programming of identification information through circuit segments in this layer, reducing the need for updating expensive metal and via layer masks by using a simpler and less costly bond pad layer mask.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If chip identification codes are programmed using selective connection of metal links across multiple metal layers, then the identification function is achieved, but the complexity and cost of mask updates increase significantly

Engineering Contradiction:
Improvechip identification code programming capabilityVSAvoidmetal layer mask complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the identification programming function from the complex multi-layer metal structure and relocates it to a dedicated bond pad layer. This separation allows the bond pad layer to handle all identification code programming independently, eliminating the need to modify expensive metal layer masks when updating identification codes.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the chip structure into functional layers: the bond pad layer handles identification programming while the metal layers handle signal routing. This segmentation allows independent optimization and modification of each layer's function without affecting the others.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If chip identification codes are programmed using selective connection of metal links across multiple metal layers, then the identification function is achieved, but the cost of mask updates increases

Engineering Contradiction:
Improvechip identification code programming capabilityVSAvoidmask update cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent extracts the identification programming function from the complex multi-layer metal structure and relocates it to a dedicated bond pad layer. This separation allows the bond pad layer to handle all identification code programming independently, eliminating the need to modify expensive metal layer masks when updating identification codes.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The bond pad layer mask serves as a disposable, low-cost element that can be updated freely for different identification codes without affecting the expensive metal layer masks. This allows cost-effective iteration and updates of chip identification functionality.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Adaptability or versatility

If metal links are selectively provided or not provided on specific metal levels to set bit values, then chip identification programming is achieved, but the design complexity increases

Engineering Contradiction:
Improvechip identification programming capabilityVSAvoiddesign complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent extracts the identification programming function from the complex multi-layer metal structure and relocates it to a dedicated bond pad layer. This separation allows the bond pad layer to handle all identification code programming independently, eliminating the need to modify expensive metal layer masks when updating identification codes.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8242603B2Chip identification using top metal layer
Publication Date: 2012.08.14 BELL SEMICONDUCTOR LLC
  • US8242603B2 patent drawing
  • US8242603B2 patent drawing
  • US8242603B2 patent drawing

AI summary

An integrated circuit (IC) structure includes a semiconductor substrate having a plurality of memory bits including IC identification information and a plurality of alternating metal and via layers thereabove. The IC structure includes a bond pad layer formed over a top one of the metal layers. The bond pad layer includes a plurality of pins connected to respective ones of the plurality of memory bits through the metal and via layers, at least one first pad connected to a higher voltage power supply rail and at least one second pad is connected to a lower voltage power supply rail. The bond pad layer has a plurality of circuit segments therein that each connects a respective one of the plurality of pins to either the at least one first pad or the at least one second pad for programming the IC identification information into the memory bit corresponding to that pin.