Bond Pad Power Network for 3D Memory Source Lines
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Solution Overview
Problem
Three-dimensional memory devices face challenges in providing a low resistance, low voltage drop power supply to vertical NAND strings, leading to current loss and inefficiency in source-side power distribution.
Innovation Solution
A bond pad-based power supply network is implemented, connecting a logic die with a power supply circuit to a memory die through a network of metal interconnect structures, ensuring low resistance paths to each vertical NAND string and minimizing current loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional power supply networks are used in three-dimensional memory devices, then device complexity is reduced, but voltage drop increases and current loss occurs
Solution Approach 1:
The patent transitions from conventional two-dimensional planar power distribution to a three-dimensional vertical power supply network. Bond pads are positioned at the periphery of the memory die and connect to source contact structures that extend vertically through alternating stacks of insulating and conductive layers, enabling power delivery in the vertical dimension and reducing voltage drop across the memory array.
Solution Approach 2:
The power supply network is nested within the memory device structure itself. Source contact structures are formed by extending through the alternating stack of insulating layers and conductive layers, with bond pads nested at the periphery. This nested configuration allows the power distribution network to be integrated within the existing memory device architecture without requiring separate external power delivery structures.
2Reliability
If bond pad-based power supply network is implemented, then voltage drop is reduced and power distribution is improved, but device complexity increases
Solution Approach 1:
The conductive layers in the alternating stack serve multiple functions: they act as both word line control structures for memory cell operation and as power distribution pathways for the bond pad-based power supply network. This multi-functionality allows the same structural elements to fulfill both memory control and power delivery roles, reducing the need for separate dedicated power distribution structures.
Solution Approach 2:
The patent merges the power distribution function with the existing memory device interconnect structure. Source contact structures that are already present for memory cell operation are also utilized as power supply pathways. The bond pads, metal interconnect structures, and source contact structures are combined to form an integrated power delivery system that leverages existing structural elements.
Data Source
AI summary
A memory die includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack, source regions located on, or in, the substrate, and at least one memory-side bonding pad electrically connected to the source regions. A logic die includes a power supply circuit configured to generate a supply voltage for the source regions, and at least one logic-side bonding pad electrically connected to the power supply circuit through a network of logic-side metal interconnect structures. The memory die is bonded to the logic die. The network of logic-side metal interconnect structures distributes source power from the power supply circuit over an entire area of the memory stack structures and transmits the source power to the memory die through bonded pairs of memory-side bonding pads and logic-side bonding pads.