Bond Pad Cap Metal Flow With Dielectric-Covered Sintering
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Solution Overview
Problem
Voids or seams in palladium layers of semiconductor devices can lead to contamination and reliability degradation or device failure due to the inability to effectively stabilize underlying circuitry during fabrication processes.
Innovation Solution
A sintering operation is performed with a protective dielectric layer covering the top metal layer, which includes heating the semiconductor device to a specific thermal profile to passivate active components and reduce grain movement, thereby minimizing defects such as hillocks and voids in the cap metal layer, followed by patterning the dielectric layer to expose bond pads and forming a cap metal layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a palladium layer is formed by chemical mechanical polish operation, then the palladium layer can be formed in a recess covering the bond pad, but voids or seams develop in the palladium layer allowing contamination to damage the bond pad or underlying materials
Solution Approach 1:
A protective dielectric layer is formed over the top metal layer before the sintering operation. This preliminary protective action prevents contamination from reaching the bond pad through voids or seams in the palladium layer that may form during subsequent processing steps.
Solution Approach 2:
The protective dielectric layer acts as an intermediary barrier between the external environment and the bond pad. It mediates the protection by blocking contamination pathways that would otherwise travel through defects in the palladium layer to reach the underlying bond pad structure.
2Reliability
If a sintering operation is performed before forming the cap metal layer, then underlying circuitry can be stabilized and active components passivated, but the top metal layer is exposed to grain movement and defect formation
Solution Approach 1:
The protective dielectric layer is formed in advance before the sintering operation to cover the top metal layer. This preliminary protective structure prevents grain movement and defect formation (such as hillocks and voids) in the top metal layer during the high-temperature sintering process, while still allowing the underlying circuitry to be stabilized and active components to be passivated.
Solution Approach 2:
The protective dielectric layer serves as an intermediary that decouples the thermal effects of sintering from the top metal layer. It allows the sintering heat to reach and stabilize the underlying circuitry while preventing the top metal layer from experiencing direct thermal stress that would cause grain movement and defect formation.
3Ease of manufacture
If the top metal layer is exposed during fabrication processes, then subsequent patterning and cap metal formation can be performed, but contamination can damage the bond pad or underlying materials
Solution Approach 1:
The protective dielectric layer is formed over the top metal layer before patterning and cap metal formation operations. This preliminary protective barrier prevents contamination from reaching and damaging the bond pad or underlying materials during these subsequent manufacturing steps, while still allowing the top metal layer to be accessed through controlled patterning operations.
Solution Approach 2:
The protective dielectric layer acts as an intermediary protective barrier that can be selectively removed through patterning to expose the top metal layer where needed, while maintaining protection over areas that require contamination prevention. This allows manufacturing operations to proceed while minimizing exposure to harmful contamination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively stabilizes underlying circuitry, reduces defects in the cap metal layer, and enhances the reliability of semiconductor devices by preventing contamination and improving electrical parameters.
Implementation Method 1
A sintering operation is performed while the top metal layer is covered by the protective dielectric layer. The sintering operation, for example, includes heating the semiconductor device for a sinter thermal profile sufficient to passivate an active component of the semiconductor device.
Data Source
AI summary
A method of forming a semiconductor device for improving an electrical connection. The semiconductor device includes a top metal layer. A protective dielectric layer is formed over the top metal layer. A sintering operation is performed while the top metal layer is covered by the protective dielectric layer. After the sintering operation, the protective dielectric layer is patterned to expose areas on the top metal layer for bond pads of the semiconductor device. A bond pad cap is formed on the top metal layer where exposed by the protective dielectric layer.