Bond Pad Stress Buffer Structure for SoIC Thermal Mismatch
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Solution Overview
Problem
The integration of device dies in System-on-Integrated-Chip (SoIC) packages faces challenges due to coefficient-of-thermal-expansion (CTE) mismatches between metal pads and surrounding dielectric layers, which weaken bonding strength and compromise circuit performance and reliability.
Innovation Solution
A bonding structure with a stress buffer zone (stress release zone) is introduced, featuring recesses around bond pads to accommodate thermal expansion, formed through selective wet etching processes, ensuring uniform distribution and enhanced bonding integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If metal pads are bonded at elevated temperature to achieve strong bonding, then bonding strength is improved, but thermal stress increases due to CTE mismatch between metal pads and dielectric layers
Solution Approach 1:
The metal pad is segmented into a bonding region and a stress buffer zone. The stress buffer zone is formed by recessing the metal pad edge, creating a distinct region that separates the bonding function from the stress accumulation function. This segmentation allows the bonding region to maintain strong adhesion while the stress buffer zone accommodates thermal expansion differences, thereby resolving the contradiction between bonding strength and thermal stress.
Solution Approach 2:
Different regions of the metal pad are given different properties: the bonding region has high adhesion quality for strong bonding, while the stress buffer zone has reduced material presence (recessed) to accommodate thermal stress. This local differentiation of properties allows the same metal pad structure to simultaneously achieve strong bonding and stress mitigation in different areas.
2Adaptability or versatility
If device dies are integrated with more functions in the same package, then circuit functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The stress buffer zone is formed on the metal pad before the bonding process occurs. This preliminary structuring of the metal pad with recessed edges prepares the bonding surfaces in advance, ensuring that when multiple device dies are bonded together in complex SoIC configurations, the thermal stress is pre-configured to be distributed evenly. This preliminary action simplifies the overall manufacturing process by preventing stress-related defects during subsequent bonding steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress buffer zone mitigates thermal stress, improving bonding strength and reliability of SoIC packages by allowing for uniform expansion, thereby enhancing circuit performance and manufacturing yield.
Implementation Method 1
coefficient-of-thermal-expansion (CTE) mismatches between metal pads and surrounding dielectric layers may weaken bonding strength
Implementation Method 2
selectively etching the metal pad to form recesses at an edge portion of the metal pad
Data Source
AI summary
A semiconductor device includes a first semiconductor structure and a second semiconductor structure disposed above the first semiconductor structure. The first semiconductor structure includes a first dielectric layer and a first bond pad surrounded by the first dielectric layer. The second semiconductor structure includes a second dielectric layer and a second bond pad surrounded by the second dielectric layer. A surface of the second bond pad is bonded to a surface of the first bond pad. The first bond pad is surrounded by a first void ring.