Bond Pad Support Structure for Semiconductor Devices

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Solution Overview

Problem

As semiconductor devices shrink and operate at higher frequencies, parasitic capacitive coupling between metal lines increases, leading to structural weakness in low-k dielectric materials used in bond pads, making them prone to damage during the wire bonding process due to mechanical stress.

Innovation Solution

The integration of a passivation structure and metallization layers with distinct routing paths and structural support features under the bond pad, utilizing low-k dielectric materials to reduce capacitive coupling while maintaining structural integrity and allowing for efficient routing of metal lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If low-k dielectric materials are used to reduce parasitic capacitive coupling, then capacitive coupling between metal lines is reduced, but structural strength of the dielectric material decreases

Engineering Contradiction:
Improveparasitic capacitive couplingVSAvoidstructural strength of dielectric material
Core Design Contradiction:
Object-generated harmful factorsVSStrength

Solution Approach 1:

The patent employs low-k dielectric materials with dielectric constants below 3.0 (such as porous silicon dioxide or carbon-doped silicon dioxide) to reduce parasitic capacitive coupling between metal lines. The composite structure combines these low-k dielectric layers with reinforced metallization layers containing bond pads, creating a layered composite that simultaneously achieves low capacitance and mechanical strength. The reinforced metallization layers act as structural support elements within the composite structure, compensating for the inherent weakness of the low-k dielectric material.

Inventive Principle:
Principle #40Composite materials

2Area of moving object

If bond pad size is reduced to increase integration density, then device size is reduced, but mechanical stress resistance during wire bonding decreases

Engineering Contradiction:
Improvebond pad areaVSAvoidmechanical stress resistance
Core Design Contradiction:
Area of moving objectVSStrength

Solution Approach 1:

The patent implements local quality enhancement by creating reinforced metallization layers with increased metal density and cross-sectional area specifically in the regions underlying the bond pads. The reinforcement structure includes multiple metallization layers (such as tungsten or copper) stacked vertically beneath each bond pad, forming a localized reinforced zone. This allows the bond pads to maintain small surface areas for high integration density while the underlying reinforced zones provide the necessary mechanical strength to withstand wire bonding stresses.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent transitions from a two-dimensional planar bond pad structure to a three-dimensional reinforced structure by adding vertical metallization layers beneath the bond pads. The reinforcement extends in the vertical dimension (z-axis) with multiple stacked metallization layers, creating a columnar reinforced structure. This dimensional transition allows the bond pad footprint to remain small while the vertical reinforcement provides enhanced mechanical support and stress distribution during wire bonding operations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Strength

If reinforced metallization layers are added to improve structural support, then mechanical strength is enhanced, but device complexity increases

Engineering Contradiction:
Improvestructural support under bond padVSAvoidmetallization layer structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent segments the metallization structure into distinct functional zones: standard interconnect metallization layers for signal routing, and reinforced metallization layers specifically positioned beneath bond pads for mechanical support. Each zone serves its dedicated function, with the reinforced layers containing higher metal density and cross-sectional area only where needed. This segmentation allows the complex reinforced structure to be integrated into the existing metallization process flow without requiring complete redesign of the entire interconnect system.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration mitigates mechanical stress during wire bonding, enhances the structural support under bond pads, and allows for efficient utilization of the volume underneath the bond pads for routing, reducing the likelihood of damage and improving the reliability of the semiconductor device.

Implementation Method 1

Parasitic capacitive coupling between elements, e.g., metal lines, increases as element device dimensions decrease and its effects can be magnified at higher operating frequencies. The capacitive coupling increases because the capacitance between two elements is inversely-proportional to the distance between them. This relationship can be seen from the formula for C, the capacitance of a parallel-plate capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

Metal lines in an IC are typically separated by silicon dioxide (SiO2), whose dielectric constant k is approximately 4.3. Reducing the dielectric constant would operate to reduce the capacitance between two elements, as can be seen from equation (1). Techniques have been developed to fabricate ICs with low-k dielectrics. Dielectric materials having a k below approximately 3.0 are considered low-k dielectrics.

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS8183698B2Bond pad support structure for semiconductor device
Publication Date: 2012.05.22 BELL SEMICONDUCTOR LLC
  • US8183698B2 patent drawing
  • US8183698B2 patent drawing
  • US8183698B2 patent drawing

AI summary

According to certain embodiments, integrated circuits are fabricated using brittle low-k dielectric material to reduce undesired capacitances between conductive structures. To avoid permanent damage to such dielectric material, bond pads are fabricated with support structures that shield the dielectric material from destructive forces during wire bonding. In one implementation, the support structure includes a passivation structure between the bond pad and the topmost metallization layer. In another implementation, the support structure includes metal features between the topmost metallization layer and the next-topmost metallization layer. In both cases, the region of the next-topmost metallization layer under the bond pad can have multiple metal lines corresponding to different signal routing paths. As such, restrictions on the use of the next-topmost metallization layer for routing purposes are reduced compared to prior-art bond-pad support structures that require the region of the next-topmost metallization layer under the bond pad to be a single metal structure.