Bond Pad Layout in Shingled Memory Dies for Thin-Substrate Reliability
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Solution Overview
Problem
Existing semiconductor memory devices with shingled stacks of dies face challenges in reducing substrate thickness while maintaining reliability, as current packaging techniques struggle to meet industry standards for bending tests at 200 MPa with a high success rate.
Innovation Solution
The solution involves stacking semiconductor dies in a shingled configuration with bond pads linearly aligned perpendicular to the slits that separate memory planes into logical blocks, allowing for a thinner substrate of 40 μm or less while maintaining electrical connectivity and reducing bending stresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the substrate thickness is reduced to increase memory density, then the package size can be reduced or memory density increased, but the bending stress increases causing die failure and reliability degradation
Solution Approach 1:
The patent divides the substrate into multiple segments by introducing slits that extend from the front surface toward the rear surface. These slits create independent stress zones that prevent stress propagation across the entire substrate, allowing thinner substrates to withstand bending forces during packaging operations while maintaining high memory density through efficient space utilization.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the substrate. The slits are strategically positioned to create localized flexibility zones where bending stresses are concentrated and managed, while other regions maintain structural integrity. This localized stress management enables thinner substrates to achieve both high density and reliability.
2Volume of moving object
If the substrate thickness is reduced to decrease package size, then the package becomes more compact, but the bending stress causes die failure during manufacturing
Solution Approach 1:
The substrate is segmented into multiple sections by slits that create independent mechanical zones. This segmentation allows the thin substrate to flex locally at slit positions during bending operations without transmitting stress across the entire structure, enabling compact packaging while maintaining sufficient strength to survive manufacturing processes.
Solution Approach 2:
The patent creates a composite structure by combining the thin substrate material with strategically positioned slits that act as stress-management features. This composite approach allows the substrate to achieve both reduced thickness for compact packaging and enhanced stress resistance through the engineered slit pattern that prevents catastrophic failure.
3Reliability
If conventional shingled stacking is used with bond pads parallel to slits, then electrical connectivity is achieved, but bending stresses cause high failure rates requiring thick substrates
Solution Approach 1:
The patent introduces asymmetry in the bond pad arrangement by positioning them perpendicular to the slit directions rather than parallel. This asymmetric configuration changes the stress distribution pattern during bending, preventing stress concentration at critical bond pad locations and enabling thinner substrates to achieve high reliability without compromising manufacturability.
Solution Approach 2:
The patent changes the geometric parameters of the bond pad layout, specifically orienting them perpendicular to the slits rather than parallel. This parameter change fundamentally alters the mechanical response of the substrate during bending operations, allowing thin substrates to withstand packaging stresses while maintaining electrical connectivity and simplifying the manufacturing process.
Data Source
AI summary
A memory device includes a package substrate and at least one stack of a plurality of semiconductor dies disposed on the package substrate. The plurality of semiconductor dies can be stacked in a shingled configuration. Each semiconductor die includes a plurality of slits disposed in a first direction. An offset direction defining the shingled arrangement is in-line with the first direction. Each semiconductor die can include a die substrate and a plurality of memory planes disposed on the die substrate with each memory plane having a memory cell array. Each slit can divide and separate each memory plane into at least one of logic blocks or sub-logic blocks. The semiconductor die can include a plurality of bond pads linearly aligned in a second direction that is perpendicular to the first direction.