Bonded Semiconductor Package Thermal Paths for Stacked Chip Cooling
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the physical size of semiconductor devices while maintaining effective heat dissipation, as traditional packaging techniques struggle to efficiently manage thermal effects in stacked and bonded semiconductor devices.
Innovation Solution
The implementation of thermal structures made from high thermal conductivity materials within a gap-filling material of lower thermal conductivity in stacked semiconductor device packages. These thermal structures are strategically placed to improve heat dissipation and reduce thermal effects, thereby enhancing device operation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If traditional packaging techniques are used for stacked semiconductor devices, then device integration is achieved, but heat dissipation efficiency deteriorates
Solution Approach 1:
The patent employs composite packaging structures combining materials with different thermal conductivities. Specifically, it uses a layered approach where at least one layer has higher thermal conductivity than others, creating a composite material system that optimizes both thermal management and structural integrity while addressing the heat dissipation challenge in stacked devices
Solution Approach 2:
The packaging structure is divided into multiple layers with distinct thermal conductivity characteristics. This segmentation allows different regions of the package to serve specialized functions: high thermal conductivity layers for heat dissipation paths and lower conductivity layers for insulation and structural support, thereby resolving the contradiction between heat management and structural complexity
2Volume of moving object
If stacked and bonded semiconductor devices are implemented, then physical size is reduced, but thermal management capability deteriorates
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional thermal management by implementing vertically stacked layers with varying thermal conductivities. This dimensional approach allows heat to be conducted through multiple layers in series, creating efficient thermal pathways that accommodate the compact stacked device architecture while maintaining effective heat dissipation
Solution Approach 2:
Different layers within the packaging structure are assigned specific thermal conductivity properties tailored to their functional requirements. High thermal conductivity materials are strategically placed in regions requiring efficient heat removal, while lower conductivity materials are used for thermal isolation and structural purposes, creating localized thermal management zones within the compact package
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of thermal structures in semiconductor device packages significantly improves heat dissipation, reduces thermal effects, and enhances the reliability and operation of stacked semiconductor devices, allowing for more compact and efficient device designs.
Implementation Method 1
thermal structures made from high thermal conductivity materials within a gap-filling material of lower thermal conductivity
Data Source
AI summary
A device includes a first semiconductor device including a first bonding layer; a second semiconductor device bonded to the first bonding layer of the first semiconductor device; thermal structures disposed beside the second semiconductor device and on the first bonding layer, wherein the thermal structures include a conductive material, wherein the thermal structures are electrically isolated from the first semiconductor device and from the second semiconductor device; an encapsulant disposed on the first bonding layer, wherein the encapsulant surrounds the second semiconductor device and surrounds the thermal structures; and a second bonding layer disposed over the encapsulant, the thermal structures, and the second semiconductor device.


