Bonded Memory-Controller Die Stacks for High-Bandwidth Flash Memory
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Solution Overview
Problem
Existing flash memory devices face challenges in achieving high bandwidth and memory capacity while maintaining cost-effectiveness in manufacturing.
Innovation Solution
A stack of bonded logic and memory die assemblies is constructed using through-substrate via structures, with metal-to-metal bonding between memory and memory-controller dies, and chip-to-chip or wafer-to-wafer bonding to reduce production costs, enhancing bandwidth and memory capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a stack of bonded logic and memory die assemblies is constructed using through-substrate via structures and metal-to-metal bonding, then bandwidth and memory capacity are enhanced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The memory system is divided into multiple separate die assemblies (memory die and memory-controller die) that are bonded together in a stack. Each die can be independently manufactured and tested, then assembled into the final high-bandwidth memory system, resolving the contradiction between achieving high bandwidth and managing device complexity.
Solution Approach 2:
The patent transitions from planar memory architecture to three-dimensional stacked architecture using through-substrate via structures. This vertical stacking enables higher memory capacity and bandwidth by utilizing the vertical dimension, while maintaining manufacturability through standardized bonding processes.
2Quantity of substance
If chip-to-chip or wafer-to-wafer bonding is used to construct stacked assemblies, then memory capacity increases, but manufacturing cost and process difficulty increase
Solution Approach 1:
Die assemblies are prepared with bonding surfaces and through-substrate via structures in advance before final stacking. This preliminary preparation allows for standardized bonding processes and enables parallel manufacturing of multiple die assemblies, reducing overall manufacturing cost and complexity despite the increased memory capacity.
Solution Approach 2:
The through-substrate via structures serve dual purposes: they provide electrical connectivity between stacked die and simultaneously act as mechanical bonding features. This self-service approach reduces the need for separate bonding structures and materials, lowering manufacturing cost while achieving high memory capacity.
3Reliability
If through-substrate via structures are used for bonding, then electrical conductive paths are established vertically across assemblies, but manufacturing precision requirements increase
Solution Approach 1:
The through-substrate via structures are formed with intentional design margins and tolerance compensation features before the bonding process. This beforehand cushioning accounts for potential variations in bonding alignment and ensures reliable electrical conductive paths are maintained even when manufacturing precision varies within normal tolerances.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a high bandwidth flash memory chip array with increased memory capacity at a lower manufacturing cost by utilizing through-substrate via structures and bonding techniques.
Implementation Method 1
metal-to-metal bonding between memory and memory-controller dies
Data Source
AI summary
A method of forming a semiconductor includes bonding a first memory die to a first memory-controller die to form a first bonded assembly, bonding second memory die to a second memory-controller die to form a second bonded assembly, and bonding the first bonded assembly to the second bonded assembly to form a memory stack.