Bonded Die Interconnect Structure for Thermal Stress Reliability
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Solution Overview
Problem
Bonded structures with interconnect structures face reliability issues and defects due to thermal stresses during manufacturing and operation, primarily caused by mismatched thermal coefficients of expansion between electronic components, interconnect structures, and molding materials.
Innovation Solution
Incorporating a low coefficient of thermal expansion (CTE) dielectric layer between electronic components and using direct bonding techniques without adhesives, along with a molding material that is carefully positioned and thinned to reduce thermal mismatch, while employing a redistribution layer for alignment and mechanical support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional bonding methods with adhesives are used, then ease of manufacture is improved, but reliability deteriorates due to thermal stresses
Solution Approach 1:
The patent removes the adhesive layer from the bonding structure, directly bonding the electronic component to the carrier substrate. This elimination of the adhesive interface removes the source of thermal stress concentration while maintaining manufacturing simplicity through direct bonding processes.
Solution Approach 2:
The patent employs a composite structure where the carrier substrate and electronic component are directly bonded without adhesive, creating a multi-material assembly that manages thermal stresses through material selection and interface design rather than relying on adhesive bonding.
2Adaptability or versatility
If materials with different thermal coefficients of expansion are used, then adaptability is improved, but stress or pressure worsens due to thermal mismatch
Solution Approach 1:
The patent applies local quality by positioning the electronic component at a specific location on the carrier substrate where thermal stress is minimized. The component is placed away from edges and corners, and the bonding interface is designed with specific geometric characteristics that locally manage thermal stress distribution.
Solution Approach 2:
The patent addresses thermal stress by transitioning from a two-dimensional planar bonding approach to a three-dimensional solution that includes vertical positioning, thickness considerations, and spatial distribution of the bonding interface, thereby managing thermal stresses through geometric design in multiple dimensions.
3Strength
If molding material is applied for protection, then strength is improved, but thermal stress worsens due to CTE mismatch
Solution Approach 1:
The patent applies molding material selectively to specific regions of the bonded structure rather than uniformly across the entire surface. This localized application provides mechanical protection where needed while minimizing the amount of material that could contribute to thermal stress, and the molding material is positioned away from critical bonding interfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and reduces thermal stresses within the bonded structure, improving the structural integrity and performance by minimizing stress concentrations at interfaces, thereby ensuring more reliable electrical and mechanical connections.
Implementation Method 1
mismatched thermal coefficients of expansion between electronic components, interconnect structures, and molding materials
Data Source
AI summary
A bonded structure is disclosed. The bonded structure can include an interconnect structure. The bonded structure can also include a first die directly bonded to the interconnect structure. The bonded structure can also include a second die mounted to the interconnect structure. The second die is spaced apart from the first die laterally along an upper surface of the interconnect structure. The second die is electrically connected with the first die at least partially through the interconnect structure. The bonded structure can further include a dielectric layer that is disposed over the upper surface of the interconnect structure between the first die and the second die.