Bonded Dies Isolation Capacitor Reducing Inductance

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Solution Overview

Problem

Existing galvanic isolation techniques in electronic circuits face limitations due to weak signal transmission and high inductance in bond wires, which restrict communication speed, and the use of sapphire substrates is costly and undesirable.

Innovation Solution

An electronic circuit structure where two dies are bonded directly with an isolation capacitor between them, eliminating the need for bond wires and allowing for higher communication speed without the expense of sapphire substrates, using interconnect layers with conductive plates and insulating layers as the capacitor dielectric.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bond wires are used to connect separate dies for capacitive isolation, then galvanic isolation is achieved, but communication speed is limited due to weak signal and large inductance

Engineering Contradiction:
Improvegalvanic isolationVSAvoidcommunication speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The invention extracts and eliminates the bond wire from the system by directly bonding the two dies together. This removes the source of large inductance and weak signal transmission, allowing capacitive isolation to be achieved through the capacitor structure alone without the performance penalties of bond wire connections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the electrical connection function with the isolation capacitor structure. Instead of using separate bond wires to connect dies that are then isolated by capacitors, the dies are directly bonded and the capacitor is integrated into the interconnect layer, combining the connection and isolation functions into a single integrated structure.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If sapphire substrates are used for isolation, then communication speed is enhanced by eliminating bond wires, but manufacturing cost increases significantly

Engineering Contradiction:
Improvecommunication speedVSAvoidmanufacturing cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The invention replaces the expensive sapphire substrate with standard semiconductor interconnect layer materials that are already part of the CMOS fabrication process. This uses inexpensive, readily available materials (copper, aluminum, and standard dielectric materials) instead of costly specialty substrates, dramatically reducing manufacturing cost while maintaining the direct-die bonding approach that enables high-speed communication.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The invention changes the material parameter from expensive sapphire to standard semiconductor interconnect materials. This parameter change maintains the functional benefit of eliminating bond wires and reducing inductance while dramatically reducing cost by using materials that are already processed in standard CMOS fabrication.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If separate dies are mounted on separate carriers for isolation, then electrical isolation is ensured, but device complexity and package size increase

Engineering Contradiction:
Improveelectrical isolationVSAvoidpackage structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention merges the isolation function into the die-to-die interface itself through the integration of the capacitor in the interconnect layer. This eliminates the need for separate carriers and complex package structures, as the isolation is achieved at the fundamental level of the die connection rather than through external packaging mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces inter-die inductance, enhancing communication speed and eliminating the need for expensive sapphire substrates, while maintaining effective electrical isolation.

Implementation Method 1

Capacitive isolation uses one or more capacitors to couple data signals across a capacitive barrier between electronic circuits. A time varying electric field transmits information across the capacitors. A dielectric material between the plates of the capacitor forms the isolation barrier.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

A dielectric material between the plates of the capacitor forms the isolation barrier.

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS9748207B2Bonded dies with isolation
Publication Date: 2017.08.29 THE SILANNA GRP
  • US9748207B2 patent drawing
  • US9748207B2 patent drawing
  • US9748207B2 patent drawing

AI summary

An electronic circuit structure is formed with first and second dies bonded together. A first active layer is formed in the first die, and a second active layer is formed in the second die. The first and second dies are bonded together, with an isolation capacitor, through which the first and second active layers communicate, disposed between the first and second dies.