Bonded Heat Spreader Multi-Chip Package for Low Thermal Resistance
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Solution Overview
Problem
Multi-chip IC packages face challenges with structural strength, mechanical warpage, and poor thermal performance due to thin metallization layers and low thermal conductivity between IC chips, leading to hot spots and difficulty in heat dissipation.
Innovation Solution
The integration of a bonded integrated heat spreader directly to the IC chips, using techniques like sintering or metal bonding, with a minimal bond line thickness, and the use of redistribution layers to enhance mechanical support and thermal conductivity, along with planarization processes to ensure flatness and uniform heat distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple IC chips are assembled into a multi-chip unit with thin metallization layers for electrical interconnection, then device integration and compactness are improved, but structural strength deteriorates due to the weak thin film dielectric layers that are prone to cracking
Solution Approach 1:
The patent employs a composite structure combining multiple IC chips with thin metallization layers embedded in dielectric layers, supported by an interposer substrate. This composite approach allows high device integration while the interposer provides mechanical reinforcement to prevent cracking of the thin film layers.
2Productivity
If multiple IC chips are integrated into a chip-scale unit, then packaging efficiency is improved, but manufacturing difficulty increases due to high warpage that makes further interconnection to host substrates difficult
Solution Approach 1:
The interposer serves as an intermediary component between the multi-chip unit and the host substrate. It provides a stable mechanical foundation that reduces warpage effects, enabling reliable interconnection to host substrates while maintaining packaging efficiency.
3Device complexity
If small IC chips are assembled together with dielectric mold material between them, then device integration is improved, but thermal performance deteriorates due to poor thermal conductivity leading to hot spots
Solution Approach 1:
The interposer acts as a thermal intermediary with high thermal conductivity, positioned between the IC chips and the host substrate. It efficiently conducts heat away from the chip assembly, preventing hot spots while maintaining device integration.
Solution Approach 2:
The patent changes the thermal conductivity parameter by replacing standard dielectric mold material with an interposer substrate that has superior thermal properties. This parameter change enables effective heat dissipation while preserving the integrated multi-chip structure.
4Adaptability or versatility
If IC chips of differing thicknesses are assembled in a multi-chip unit, then design flexibility is improved, but thermal conduction deteriorates due to increased material of poor thermal conductivity needed between chips and thermal solutions
Solution Approach 1:
The interposer serves as a thermal intermediary that compensates for varying chip thicknesses. Its high thermal conductivity ensures efficient heat transfer from all chips regardless of their different thicknesses, maintaining thermal performance while allowing design flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves mechanical strength and thermal conductivity, reducing warpage and hot spots, enabling effective heat dissipation and facilitating integration with host substrates.
Implementation Method 1
thermal conduction within both an x-y plane and a z-height of the multi-chip assemblies may therefore be poor
Implementation Method 2
using techniques like sintering or metal bonding
Data Source
AI summary
A multi-chip unit suitable for chip-level packaging may include multiple IC chips that are interconnected through a metal redistribution structure, and that are directly bonded to an integrated heat spreader. Bonding of the integrated heat spreader to the multiple IC chips may be direct so that no thermal interface material (TIM) is needed, resulting in a reduced bond line thickness (BLT) and lower thermal resistance. The integrated heat spreader may further serve as a structural member of the multi-chip unit, allowing a second side of the redistribution structure to be further interconnected to a host by solder interconnects. The redistribution structure may be fabricated on a sacrificial interposer that may facilitate planarizing IC chips of differing thickness prior to bonding the heat spreader. The sacrificial interposer may be removed to expose the RDL for further interconnection to a substrate without the use of through-substrate vias.