Bonded Memory Bit Line Fault Detection With Ground Transistors
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Solution Overview
Problem
Existing memory devices face challenges in detecting defects such as open circuits and short circuits, particularly in bit lines, due to the difficulty in identifying defects in the control die when the memory die and control die are bonded together, as metal regions between the dies can block laser beam transmission, making it hard to detect defects in the control die.
Innovation Solution
The implementation of a control die with bit lines connected to ground transistors, where even-numbered and odd-numbered bit lines are commonly controlled to detect open circuits and short circuits, allowing for the identification of defects in both the memory die and control die, and using Optical Beam Induced Resistance Change (OBIRCH) to determine the physical location of defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory die and control die are bonded together, then device functionality is improved, but defect detection capability deteriorates due to metal regions blocking laser beam transmission
Solution Approach 1:
The patent segments the bit lines into even-numbered and odd-numbered groups, each connected to separate ground transistors. This segmentation allows independent testing of each group by selectively activating specific ground transistors, enabling defect detection in bonded structures where traditional laser-based methods fail due to metal region blocking.
Solution Approach 2:
The patent introduces ground transistors as intermediary elements between the bit lines and ground. These transistors serve as controllable switches that enable electrical testing of bit line defects without requiring direct laser access to the control die, thus overcoming the blocking effect of metal regions in bonded structures.
2Difficulty of detecting and measuring
If ground transistors are added to control die bit lines, then defect detection capability is improved, but device complexity increases
Solution Approach 1:
The ground transistors added to the control die serve multiple functions: they enable defect detection in bonded structures, provide ground paths for electrical testing, and maintain compatibility with existing memory operations. This multi-functionality justifies the added complexity by delivering significant testing capabilities.
Solution Approach 2:
The ground transistors are incorporated into the control die design before bonding occurs, allowing defect detection capabilities to be built in advance. This preliminary action ensures that testing infrastructure is ready before the bonding process creates the metal region blocking problem, enabling immediate defect detection without requiring post-bonding modifications.
3Measurement precision
If even-numbered and odd-numbered bit lines are commonly controlled, then detection precision is improved, but device complexity increases
Solution Approach 1:
By segmenting bit lines into even-numbered and odd-numbered groups with separate ground transistor control, the patent enables precise localization of defects to specific bit line groups. This segmentation strategy improves detection precision by allowing independent testing of each group, while the systematic organization keeps the added complexity manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables effective detection and localization of defects in both the memory die and control die, improving the reliability of defect detection processes and allowing for precise identification of defective bit lines.
Implementation Method 1
using Optical Beam Induced Resistance Change (OBIRCH) to determine the physical location of defects
Data Source
AI summary
Apparatuses and techniques are presented for detecting bit line open circuits and short circuits in a memory device in which a memory die is inverted and bonded to a control die. In one approach, the control die comprises a set of bit lines which are connected to a set of bit lines of the memory die, and the set of bit lines of the control die comprise ground transistors, e.g., transistors connected to a ground node. Ground transistors of even-numbered bit lines may be commonly controlled, while ground transistors of odd-numbered bit lines are commonly controlled. The ground transistors may be controlled to detect open circuits and short circuits in the bit lines of the control die and the memory die. A laser scanning technique can also be used to determine a physical location of a defect of a bit line.


