Center-Connected Bonded Memory Assembly for Dense 3D NAND I/O
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Solution Overview
Problem
Existing three-dimensional vertical NAND string structures face challenges in optimizing the layout of input/output pads, leading to reduced device density and operational speed due to peripheral input/output areas.
Innovation Solution
A bonded memory assembly with center input/output pads is introduced, featuring a through-stack via structure that connects external bonding pads to input/output drivers, eliminating the need for dedicated peripheral input/output areas and enhancing operational speed by consolidating electrical connections around the center region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If peripheral input/output areas are used for bonding pads, then electrical connections can be established, but device density is reduced due to wasted peripheral memory array area
Solution Approach 1:
The patent moves input/output bonding pads from the traditional peripheral two-dimensional layout to the vertical dimension by forming them on the backside of the memory die through through-stack via structures. This dimensional transition allows the memory array to fully utilize the peripheral area while maintaining electrical connections through the stack, thereby increasing device density without excessive layout complexity
Solution Approach 2:
Instead of placing bonding pads on the front peripheral area of the memory die as in conventional designs, the patent inverts the approach by placing bonding pads on the backside of the die. This inversion allows the front peripheral area to be fully utilized for the memory array, resolving the contradiction between density and layout complexity
2Speed
If peripheral input/output areas are used for bonding pads, then electrical connections can be established, but operational speed is reduced due to longer signal paths
Solution Approach 1:
The patent utilizes the vertical dimension by implementing through-stack via structures that extend vertically through the alternating stack of insulating and conductive layers. This vertical signal path is shorter than the horizontal peripheral path, reducing signal propagation distance and improving operational speed while maintaining electrical connectivity
3Quantity of substance
If through-stack via structures are formed to connect backside bonding pads to memory array, then device density and speed are improved, but manufacturing complexity increases
Solution Approach 1:
The through-stack via structures are formed during the manufacturing process before the memory die is separated from the substrate. This preliminary formation of vias through the alternating stack simplifies the overall manufacturing by integrating the complex via formation into the existing fabrication sequence, rather than adding post-processing steps
Solution Approach 2:
The alternating stack of insulating and conductive layers serves multiple functions: it provides the memory structure, enables through-stack via formation for backside bonding, and maintains electrical connectivity. This multi-functionality reduces the need for additional specialized structures, simplifying the manufacturing process while achieving high density
Data Source
AI summary
A bonded assembly includes a logic die and a memory die. The memory die includes an alternating stack of insulating layers and electrically conductive layers, memory-side dielectric material layers embedding memory-side metal interconnect structures and memory-side bonding pads, memory stack structures each comprising a memory film and a vertical semiconductor channel vertically extending through the alternating stack in a memory array region, layer contact via structures contacting a respective electrically conductive layer within the alternating stack in a contact region, a through-stack via structure vertically extending through a vertically-extending opening in the alternating stack within a center region of the memory die, and a backside conductive pad electrically contacting the a through-stack via structure. The logic die includes a peripheral circuit and logic-side bonding pads which are bonded to the memory-side bonding pads.