Bonded Multi-Plane Nonvolatile Memory for Higher Integration
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Solution Overview
Problem
The challenge in nonvolatile memory devices is to achieve higher integration while reducing the planar area, which existing technologies have not effectively addressed, limiting design freedom and performance.
Innovation Solution
The proposed solution involves a nonvolatile memory device with multiple structures stacked and directly bonded, where each structure has a different number of memory planes, allowing for independent design of the number of memory planes in each layer to optimize performance and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If multiple structures are stacked and directly bonded to achieve higher integration, then the planar area is reduced, but the design freedom is limited due to uniform structure requirements
Solution Approach 1:
The memory device is divided into multiple independently designable structures (first structure and second structure), each containing memory planes. The first structure includes a first memory plane with first bonding pads, while the second structure includes a second memory plane with second bonding pads. This segmentation allows each structure to be optimized independently while maintaining the stacked configuration for reduced planar area.
Solution Approach 2:
Different structures are allowed to have different numbers of memory planes (first memory plane count differs from second memory plane count), enabling local optimization of each structure's properties. This local quality approach permits tailored designs where each structure can be customized for specific performance requirements while still being part of the integrated stacked device.
2Ease of manufacture
If structures are uniformly designed for stacking, then manufacturing is simplified, but performance optimization is limited
Solution Approach 1:
The patent allows variation in key parameters such as the number of memory planes in each structure (first memory plane count vs. second memory plane count) while maintaining compatibility for stacking. This parameter flexibility enables performance optimization for different applications without fundamentally changing the manufacturing process or structure design rules.
3Stability of the object's composition
If all structures have the same number of memory planes, then device uniformity is maintained, but yield optimization is restricted
Solution Approach 1:
Each structure is permitted to have a different number of memory planes (first structure has first memory plane count, second structure has second memory plane count), enabling independent optimization of each structure for maximum yield. This local quality approach maintains overall device functionality while allowing individual structures to be tuned for their optimal performance and manufacturing yield.
Data Source
AI summary
A nonvolatile memory device and a data storage system including the same are provided. The nonvolatile memory device includes: a first structure including at least one first memory plane; and a second structure bonded to the first structure and including at least one second memory plane, wherein the number of the at least one first memory plane included in the first structure is different from the number of the at least one second memory plane included in the second structure.