Bonded Semiconductor Memory Structure for Thermal Budget Isolation
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Solution Overview
Problem
Conventional semiconductor devices face performance degradation of circuit devices under the memory array structure during manufacturing, leading to low performance of both circuit and memory array components.
Innovation Solution
A semiconductor structure comprising a first substrate with a first circuit layer, a memory array structure, a bonding layer, a second circuit layer, and a second substrate, where the second circuit layer with high-performance devices is bonded onto the structure containing the memory array and circuit devices less sensitive to thermal budget, allowing for enhanced control and protection of memory array performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If circuit devices are disposed under the memory array structure to increase device density, then the quantity of circuit devices is improved, but the performance of circuit devices deteriorates due to exposure to thermal budget during memory array manufacturing
Solution Approach 1:
The patent divides the circuit devices into two separate groups: first circuit devices disposed under the memory array structure and second circuit devices disposed on a separate second substrate. This segmentation allows the first circuit devices to provide basic control functions while the second circuit devices can be optimized for high-performance applications without being exposed to the thermal budget of memory array manufacturing processes.
Solution Approach 2:
The patent introduces a bonding layer as an intermediary component that couples the first substrate (containing memory array and first circuit devices) with the second substrate (containing second circuit devices). This bonding layer enables the integration of high-performance second circuit devices with the memory array structure while protecting them from thermal damage during manufacturing.
2Quantity of substance
If a circuit layer is formed on the whole substrate followed by memory array structure formation, then the quantity of circuit devices is improved, but the performance of both circuit devices and memory array deteriorates due to mutual interference during manufacturing
Solution Approach 1:
The patent segments the circuit devices into first circuit devices integrated with the memory array on the first substrate and second circuit devices placed on a separate second substrate. This spatial segmentation eliminates the mutual interference that occurs when all circuit devices are formed on the same substrate as the memory array, allowing each component to be optimized independently while maintaining high device density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the manufacturing of semiconductor structures with higher performance circuit devices and memory arrays, maintaining the integrity and performance of both components by segregating sensitive high-performance devices from the thermal budget of the array process.
Implementation Method 1
The second structure is bonded to the first structure
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a first substrate, a first circuit layer, a memory array structure, a bonding layer, a second circuit layer, and a second substrate. The first circuit layer is disposed on the first substrate. The memory array structure is disposed on the first circuit layer. The bonding layer is disposed on the memory array structure. The second circuit layer is disposed on the bonding layer. The second substrate is disposed on the second circuit layer.