Bonded Polycrystalline SiC Substrate for High Resistivity and Low Warpage
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing silicon carbide (SiC) wafers with high resistivity and low warpage, as existing polycrystalline SiC wafers have low resistivity, limiting their use in high power applications and resulting in defects and increased manufacturing costs due to crystal defects and warpage issues.
Innovation Solution
A polycrystalline SiC substrate with a high resistivity of at least 1×10^5 ohm·cm and low warpage is developed, featuring a monocrystalline SiC layer bonded to a polycrystalline SiC base substrate using surface-activated bonding, with a grain size of 0.5 mm or greater, optimized for high power and high frequency applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polycrystalline SiC wafers are manufactured with conventional methods, then manufacturing cost is reduced, but resistivity is low which limits use in high power applications
Solution Approach 1:
The patent creates a composite structure by bonding a monocrystalline SiC layer to a polycrystalline SiC substrate. The monocrystalline layer provides high resistivity and low defect density suitable for high power applications, while the polycrystalline substrate offers cost-effective manufacturing and mechanical support. This composite approach allows the final product to achieve both high reliability and reasonable manufacturing cost.
2Manufacturing precision
If polycrystalline SiC wafers are manufactured with conventional methods, then manufacturing simplicity is maintained, but warpage is high causing defects and cracked wafers during processing
Solution Approach 1:
The patent controls warpage by carefully managing processing parameters during the bonding process, including temperature profiles, bonding pressure, and cooling rates. By optimizing these parameters, the thermal stress and mechanical stress are minimized, resulting in reduced warpage and fewer defects during subsequent polishing and processing steps.
3Reliability
If low resistivity is used in SiC wafers, then electrical signal travel ability is improved, but ability to be utilized in high power applications is limited
Solution Approach 1:
The patent applies local quality by creating a layered structure where different regions serve different functions. The monocrystalline SiC layer provides high resistivity and low defect density for high power application suitability, while the overall wafer structure maintains adequate electrical signal travel ability. Each layer is optimized for its specific function, allowing the device to meet both requirements simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The high resistivity polycrystalline SiC substrate enables stable electrical performance with reduced insertion loss, fewer crystal defects, and lower manufacturing costs by utilizing a less expensive polycrystalline SiC substrate with a bonded monocrystalline SiC layer, enhancing the functionality and reliability of high power electronic devices.
Implementation Method 1
A polycrystalline SiC substrate with a high resistivity of at least 1×10^5 ohm·cm and low warpage is developed, featuring a monocrystalline SiC layer bonded to a polycrystalline SiC base substrate using surface-activated bonding
Data Source
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AI summary
A polycrystalline SiC wafer or substrate with a high resistivity benefits functionality of a high power electronic or system in which the polycrystalline SiC wafer or substrate is present or is utilized in manufacturing the high power electronic or system. At least one embodiment of a wafer includes a polycrystalline SiC wafer or substrate that has a high resistivity (e.g., equal to or greater than 1·10^5 or 1E+5 ohm·centimeters) and low warpage. Electronic devices or components made with or from the wafer including the high resistivity polycrystalline SiC wafer or substrate are further optimized when in use and have fewer to no crystal defects. The wafer formed according to the embodiments of the present disclosure has a high or very high resistivity as compared to existing polycrystalline SiC wafers or substrate.