Bonded Substrate Inductor Stacking for High Qdc in Small Area
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Solution Overview
Problem
High power devices and high performance RF circuits require inductors with high Qdc at low frequencies, but increasing the width of metallic lines to achieve high Qdc results in increased area consumption.
Innovation Solution
A semiconductor structure is formed by embedding a pair of spiral-shaped metallic features within bonded semiconductor substrates, either stacked and directly connected or physically separated and connected in parallel using TSVs, to create a single large inductor with high Qdc in a small area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of metallic lines is increased to reduce Rdc and achieve high Qdc, then the quality factor improves, but the overall area consumption increases
Solution Approach 1:
The patent transitions from a two-dimensional planar spiral inductor to a three-dimensional stacked configuration by bonding two semiconductor substrates together. Each substrate contains a spiral-shaped metallic feature, and the substrates are bonded such that the spiral features are stacked vertically and electrically connected, forming a single inductor with effective area equal to half the substrate area.
Solution Approach 2:
The inductor is divided into two separate spiral-shaped metallic features located in different semiconductor substrates. These segmented inductor portions are electrically connected through the substrate bonding interface, allowing each segment to contribute to the overall inductance while sharing the current load, which reduces resistance without requiring increased line width.
2Reliability
If wide metallic lines are used to reduce resistance, then Qdc improves, but manufacturing complexity increases due to larger feature sizes
Solution Approach 1:
The solution moves the inductor structure into the vertical dimension by stacking two substrates, allowing standard-width metallic lines to achieve the same current-carrying capacity as wide lines would provide in a single substrate, thereby maintaining manufacturability while improving electrical performance.
Solution Approach 2:
Two separate inductor structures in different substrates are merged into a single functional inductor through substrate bonding and electrical connection at the interface. This combined structure achieves lower resistance and higher Qdc while using standard manufacturing line widths that are compatible with existing fabrication processes.
Data Source
AI summary
Disclosed is a structure and a method of forming the structure. The structure includes first and second semiconductor substrates with adjacent surfaces (e.g., bonded surfaces), a first spiral-shape metallic feature in the first semiconductor substrate, and a second spiral-shaped metallic feature in the second semiconductor substrate. The second spiral-shaped metallic feature is aligned above and electrically connected to the first spiral-shaped metallic feature. In some embodiments, the second spiral-shaped metallic feature is stacked on and immediately adjacent to the first spiral-shaped metallic feature at the bonded surfaces, thereby forming a relatively large inductor with high Qdc in a relatively small area. In other embodiments, the first and second spiral-shaped metallic features are discrete inductors located on opposite sides of the semiconductor substrates from the bonded surfaces but electrically connected in parallel (e.g., using stacked TSVs), effectively forming a relatively large inductor with a high Qdc in a relatively small area.