Bonding Connector Layout With Dummy Features for Dense 3DIC Stacking

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Solution Overview

Problem

The semiconductor industry faces challenges in developing stacked semiconductor structures, such as 3DICs, with improved electrical performance, particularly in terms of miniaturization, speed, bandwidth, power consumption, and latency.

Innovation Solution

A manufacturing method for a tier of a semiconductor structure involves forming contact pads, a dielectric structure, bonding connectors, and dummy features. The bonding connectors are electrically coupled to the contact pads, while the dummy features are laterally interposed between adjacent bonding connectors, facilitating metal diffusion and grain growth during thermal annealing to form reliable bonds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If bonding connectors are placed closer together to achieve miniaturization, then device size is reduced, but bonding quality and electrical performance deteriorate

Engineering Contradiction:

Improvedevice sizeVSAvoidbonding quality

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

A dummy feature is introduced as an intermediary element between adjacent bonding connectors. This dummy feature serves as a mediator that facilitates metal diffusion and grain growth during thermal annealing, enabling reliable bonding between connectors even when they are placed closer together for miniaturization. The dummy feature acts as a bridge that improves bonding quality without requiring increased spacing between functional connectors.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the physical and chemical parameters of the bonding interface by introducing a dummy feature with specific material properties. During thermal annealing, the dummy feature undergoes controlled metal diffusion and grain growth, transforming the bonding interface parameters to achieve reliable electrical connections. This parameter transformation enables miniaturization while maintaining bonding quality.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If thermal annealing is applied to improve bonding quality, then electrical performance is enhanced, but power consumption increases

Engineering Contradiction:

Improveelectrical performanceVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The dummy feature is pre-formed during the manufacturing process before final assembly and operation. The structure is prepared in advance with the dummy feature positioned to facilitate subsequent thermal annealing. This preliminary preparation enables efficient bonding during thermal annealing, reducing the energy required during actual operation and improving electrical performance without excessive power consumption.

Inventive Principle:

Principle #10Preliminary action

3Productivity

If more bonding connectors are integrated to increase bandwidth, then data transmission capacity is improved, but manufacturing complexity increases

Engineering Contradiction:

ImprovebandwidthVSAvoidmanufacturing complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The dummy feature serves multiple functions simultaneously: it acts as a structural spacer, a diffusion facilitator, a grain growth promoter, and a bonding quality enhancer. This multi-functionality allows for the integration of more bonding connectors to increase bandwidth without proportionally increasing manufacturing complexity, as the same dummy feature structure addresses multiple challenges.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the electrical performance of stacked semiconductor structures by improving bonding quality and reducing latency, while also allowing for miniaturization and reduced power consumption.

Implementation Method 1

facilitating metal diffusion and grain growth during thermal annealing to form reliable bonds

Methodology Applied

Scientific EffectMetal diffusion: Diffusion

Implementation Method 2

facilitating metal diffusion and grain growth during thermal annealing to form reliable bonds

Methodology Applied

Scientific EffectThermal annealing: Annealing

Implementation Method 3

facilitating metal diffusion and grain growth during thermal annealing to form reliable bonds

Methodology Applied

Scientific EffectGrain growth:

Data Source

PatentUS12237284B2Semiconductor structure comprising dummy feature interposed between the bonding connectors

Publication Date: 2025.02.25 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an interconnect structure disposed over a semiconductor substrate, contact pads disposed on the interconnect structure, a dielectric structure disposed on the interconnect structure and covering the contact pads, bonding connectors covered by the dielectric structure and landing on the contact pads, and a dummy feature covered by the dielectric structure and laterally interposed between adjacent two of the bonding connectors. Top surfaces of the bonding connectors are substantially coplanar with a top surface of the dielectric structure, and the bonding connectors are electrically coupled to the interconnect structure through the contact pads.