Bonding Interface Structure Using Redistribution Lines for Thinner Dies
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher integration density and smaller semiconductor dies with more components due to limitations in bonding processes and material usage, leading to inefficiencies in manufacturing and performance.
Innovation Solution
A method is introduced where integrated circuit dies are directly bonded without forming die connectors and a dielectric bond layer, utilizing redistribution lines and passivation layers to achieve direct bonding, resulting in thinner dies with greater bonding density and improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If die connectors and dielectric bond layer are formed using conventional bonding processes, then bonding reliability is achieved, but manufacturing complexity and processing steps increase
Solution Approach 1:
The patent removes the dielectric bond layer from the bonding interface, extracting this component entirely from the structure. This eliminates the need for dielectric material deposition and associated processing steps while maintaining bonding functionality through direct metal-to-metal contact between redistribution lines
Solution Approach 2:
The patent merges the bonding function directly into the redistribution lines by forming metal-to-metal bonds between corresponding redistribution lines on different dies. This combines the interconnect function and bonding function into a single integrated structure, eliminating separate die connectors and dielectric layers
2Strength
If die connectors and dielectric bond layer are formed using conventional bonding processes, then bonding strength is achieved, but manufacturing time and processing steps increase
Solution Approach 1:
The patent extracts the dielectric bond layer from the bonding process, eliminating time-consuming dielectric deposition, patterning, and etching steps. The bonding process is reduced to forming metal-to-metal bonds between redistribution lines, significantly shortening manufacturing cycle time
Solution Approach 2:
The redistribution lines are pre-formed with bonding-capable metal surfaces before the bonding process. This preliminary preparation ensures that when bonding occurs, the metal surfaces are already positioned and configured for direct bonding, eliminating the need for subsequent dielectric layer formation and reducing overall manufacturing time
3Reliability
If conventional bonding processes with dielectric bond layer are used, then bonding reliability is maintained, but die thickness and overall device size increase
Solution Approach 1:
The patent extracts the dielectric bond layer from the bonding interface, removing the additional thickness that would be required to deposit and pattern dielectric material. This results in thinner dies with reduced overall device size while maintaining bonding reliability through direct metal-to-metal bonding
Solution Approach 2:
The interconnect function and bonding function are merged into the same metal structure (redistribution lines), eliminating the need for separate dielectric bonding layers. This integration reduces the vertical space required for bonding while maintaining the electrical connection functionality
Data Source
AI summary
In an embodiment, a method includes forming active devices over a semiconductor substrate; forming an interconnect structure over the semiconductor substrate, the interconnect structure comprising a contact pad embedded in a dielectric layer; forming a first passivation layer over the interconnect structure; forming a first opening through the first passivation layer to expose the contact pad; depositing a seed layer over the first passivation layer and in the first opening; forming a sacrificial material over the seed layer; patterning the sacrificial material to reform the first opening and to form a second opening; depositing conductive material to form a first redistribution line in the first opening and a second redistribution line in the second opening; removing the sacrificial material; and attaching an integrated circuit die to the first redistribution line and the second redistribution line.