Semiconductor Bonding Layer for Reversible Wafer Interconnects

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Solution Overview

Problem

Current bonding techniques in semiconductor manufacturing form permanent electrical connections between wafers or dies, lacking the ability to switch between connected and disconnected states.

Innovation Solution

A hybrid bonding process using selectively grown bonding layers of aluminum and silicon alkoxides on oxide surfaces, allowing for the formation of interconnect structures that can be electrically connected or disconnected by catalyzing rearrangement via beta-elimination at low temperatures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional oxide-to-oxide bonding is used, then strong adhesion is achieved, but the connection becomes permanent and cannot be switched off

Engineering Contradiction:
Improvebonding adhesionVSAvoidreversibility of connection
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the chemical composition parameters of the bonding layer by using aluminum and silicon alkoxides instead of traditional oxide materials. This parameter change enables the bonding layer to exhibit reversible bonding characteristics while maintaining strong adhesion through catalyzed rearrangement at low temperatures.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite bonding system using aluminum and silicon alkoxides that work together to provide both strong adhesion and reversibility. The combination of these materials forms a bonding layer with unique properties that neither material alone could achieve, enabling switchable connections.

Inventive Principle:
Principle #40Composite materials

2Reliability

If conventional bonding techniques are used, then electrical connection is achieved, but switching between connected and disconnected states is not possible

Engineering Contradiction:
Improveelectrical connectionVSAvoidswitchability of interconnect
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic characteristics to the interconnect structure by enabling it to transition between connected and disconnected states. The bonding layer can be reversibly formed and removed through catalyzed rearrangement, making the electrical connection dynamic rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses parameter changes in temperature and catalysis to control the bonding state. By applying heat and catalysts, the bonding layer undergoes rearrangement that switches the connection state, enabling dynamic control of electrical connectivity.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If high temperature and pressure are applied for bonding, then strong bond formation is achieved, but damage to sensitive semiconductor structures may occur

Engineering Contradiction:
Improvebond strengthVSAvoidthermal damage to semiconductor structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent dramatically changes the temperature parameter required for bonding by using aluminum and silicon alkoxides with catalyzed rearrangement. The bonding process occurs at low temperatures (below 100°C) compared to traditional high-temperature bonding, eliminating thermal damage risks while maintaining bond strength.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/thermal bonding system with a chemical bonding system based on catalyzed rearrangement of silicon alkoxides. This substitution allows bond formation through chemical reactions rather than high temperature and pressure, protecting sensitive semiconductor structures.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Reliability

If permanent electrical connections are formed, then signal integrity is maintained, but power consumption increases and reconfigurability is lost

Engineering Contradiction:
Improvesignal integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces dynamic control to the electrical connection, allowing the system to switch between connected and disconnected states as needed. This enables power consumption optimization by disconnecting unused interconnects while maintaining signal integrity when connections are active.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses parameter changes (temperature, catalysis) to control the bonding state dynamically. This enables the system to adjust its electrical connectivity based on operational requirements, optimizing power consumption while maintaining signal integrity when needed.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables reversible electrical connections between wafers or dies, facilitating Power-Performance-Area-Cost (PPAC) scaling in complex circuits like Systems on Chip (SOCs) with reduced temperature and pressure requirements.

Implementation Method 1

catalyzing rearrangement via beta-elimination at low temperatures

Methodology Applied
Scientific EffectBeta-elimination:

Implementation Method 2

catalyzing rearrangement via beta-elimination

Methodology Applied
Scientific EffectCatalysis: Catalysis

Implementation Method 3

hybrid bonding process using selectively grown bonding layers of aluminum and silicon alkoxides on oxide surfaces

Methodology Applied
Scientific EffectChemical bonding: Chemical Bonding

Data Source

PatentUS20250343187A1Bonding layer and process of making
Publication Date: 2025.11.06 TOKYO ELECTRON LTD
  • US20250343187A1 patent drawing
  • US20250343187A1 patent drawing
  • US20250343187A1 patent drawing

AI summary

A process for forming a semiconductor package is disclosed. The process includes providing a first substrate including a first dielectric layer. The process includes overlaying a first surface of the first dielectric layer with a first bonding layer that includes aluminum. The process includes providing a second substrate including a second dielectric layer. The process includes overlaying a second surface of the second dielectric layer with a second bonding layer that includes alkoxy-siloxide. The process includes forming a third bonding layer by combining the first bonding layer and the second bonding layer so as to bond the first substrate to the second substrate.