Semiconductor Bonding Pad Adjustment Layer for Simpler Hybrid Bonding

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Solution Overview

Problem

The existing hybrid bonding process for semiconductor devices is complex and costly, limiting the integration of smaller devices into a given area while maintaining high performance, miniaturization, and light weight.

Innovation Solution

The introduction of an adjustment layer between the bonding pad and the topmost conductive layer of the interconnection structure in semiconductor devices, which simplifies the bonding process by eliminating the need for bonding vias and allowing for higher flexibility and uniformity, reduces process complexity and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the existing hybrid bonding process is used to stack and bond multiple semiconductor dies, then high performance and large capacity are achieved, but the process complexity increases and process cost becomes relatively high

Engineering Contradiction:
Improvebonding performanceVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the bonding via structure from the traditional hybrid bonding process. By removing this complex intermediate structure, the bonding process is simplified while maintaining bonding performance through direct bonding pad contact between semiconductor dies.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using bonding vias to connect bonding pads (traditional approach), the patent inverts the approach by enabling direct bonding pad-to-bonding pad contact. This reversal eliminates the via structure and simplifies the bonding process while achieving the same electrical and mechanical connection functions.

Inventive Principle:
Principle #13The other way round (Inversion)

2Area of moving object

If the existing hybrid bonding process is used to integrate more devices into a given area, then large capacity and miniaturization are achieved, but the process cost becomes relatively high

Engineering Contradiction:
Improveintegration densityVSAvoidprocess cost
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

By extracting the bonding via structure from the process, the patent reduces manufacturing steps and material requirements. This elimination directly lowers process cost while maintaining the ability to achieve high integration density through simplified die stacking and bonding operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If bonding vias are used in the bonding structure, then electrical connection is achieved, but the device structure becomes more complex

Engineering Contradiction:
Improveelectrical connectionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the traditional bonding structure by eliminating bonding vias and enabling direct bonding pad contact. This reversal achieves electrical connection through the bonding pads themselves, removing the need for additional via structures and significantly simplifying the overall device architecture.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent merges the functions of electrical connection and mechanical bonding into a single bonding pad interface. By combining these functions, the need for separate bonding vias is eliminated, reducing structural complexity while maintaining reliable electrical connection between stacked dies.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240413106A1Semiconductor device and method of fabricating the same
Publication Date: 2024.12.12 UNITED MICROELECTRONICS CORP
  • US20240413106A1 patent drawing
  • US20240413106A1 patent drawing
  • US20240413106A1 patent drawing

AI summary

A semiconductor device includes a substrate, a bonding structure and an adjustment layer. A bonding structure is located over the substrate. The adjustment layer is located on a bonding pad of the bonding structure.