Bonding Pad Air-Gap Structure for Wire Bond Stress Cushioning

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Solution Overview

Problem

The manufacturing and integration of semiconductor devices face complexity issues, leading to deficiencies and a need for improved manufacturing processes.

Innovation Solution

Incorporating porous dielectric portions separated by air gaps within the semiconductor device structure, which act as a cushion to mitigate stress from wire bonds, enhancing performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonds are attached directly to bonding pads on rigid dielectric structures, then electrical connectivity is achieved, but stress and mechanical impact during bonding processes reduce device reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructural impact resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent introduces porous dielectric portions between the bonding pad and the rigid interconnect structure. These porous materials act as stress-absorbing cushions during wire bond attachment, reducing mechanical impact and improving device reliability while maintaining electrical connectivity through the dielectric structure.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent pre-installs porous dielectric portions and air gaps in the bonding structure before wire bond attachment. This beforehand cushioning absorbs the mechanical stress and impact during the bonding process, preventing damage to the rigid interconnect structure and improving overall device reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If traditional solid dielectric structures are used in semiconductor devices, then manufacturing processes are straightforward, but stress from wire bonds reduces yield and performance

Engineering Contradiction:
Improvedevice yieldVSAvoiddielectric structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent incorporates porous dielectric portions into the semiconductor device structure. These porous materials provide stress absorption during bonding while maintaining relatively simple manufacturing processes, thereby improving device yield without significantly increasing fabrication complexity.

Inventive Principle:
Principle #31Porous materials

3Reliability

If air gaps are introduced between bonding pads and dielectric portions, then stress cushioning improves reliability, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebonding process reliabilityVSAvoidair gap formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent uses porous dielectric portions that can be formed with standard semiconductor manufacturing techniques. The porosity provides the necessary air gaps and stress absorption without requiring ultra-precise control of gap dimensions, thus maintaining manufacturing feasibility while improving bonding reliability.

Inventive Principle:
Principle #31Porous materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The air gaps provide a cushioning effect, improving the semiconductor device's performance, reliability, and yield by reducing structural impact during bonding processes.

Implementation Method 1

the air gaps provide a cushion to reduce the impact of the stress from the wire bond on the underlying structure

Methodology Applied
Scientific EffectCushioning effect: Damping

Data Source

PatentUS12489072B2Semiconductor device with air gap and method for preparing the same
Publication Date: 2025.12.02 NAN YA TECH
  • US12489072B2 patent drawing
  • US12489072B2 patent drawing
  • US12489072B2 patent drawing

AI summary

A semiconductor device includes an interconnect structure disposed over a semiconductor substrate. The interconnect structure includes a first interconnect portion and a second interconnect portion. The semiconductor device also includes a first porous dielectric portion disposed between the first interconnect portion and the second interconnect portion, and a dielectric layer surrounding the first porous dielectric portion. The semiconductor device further includes a bonding pad disposed over the dielectric layer and the first porous dielectric portion. The bonding pad and the first porous dielectric portion are separated by a first air gap.