Bonding Pad Bias Switching Circuit for Fast Low-Current Rise Control
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Solution Overview
Problem
The existing electrical circuits connected to bonding pads in high-density NOR flash memory devices face challenges in achieving low current consumption and high-speed switching of bias voltages, leading to increased RC time constants and susceptibility to noise interference, especially when multiple pads are connected.
Innovation Solution
An electrical circuit configuration that includes a voltage pull-up circuit, a voltage pull-down circuit, a rise time delay control circuit, and a driving circuit, utilizing transistors and inverters to control the bias voltage switching, reducing current consumption and noise immunity by optimizing resistor values and transistor sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a pull-up resistor is used to set the bias voltage of the bonding pad to a high voltage, then the bias voltage can be maintained at a stable high level, but the current consumption increases and the RC time constant increases leading to slower voltage switching
Solution Approach 1:
The patent replaces the static pull-up resistor with dynamic transistor-based switching circuits (PMOS transistors in the voltage pull-up circuit and NMOS transistors in the voltage pull-down circuit) that can actively control the bias voltage state. This allows the circuit to consume minimal current when in a stable state while enabling fast transitions when switching is required, resolving the contradiction between stability and energy consumption.
Solution Approach 2:
The patent implements periodic control of the bias voltage through clocked switching circuits that activate the pull-up and pull-down transistors only when needed. The bias voltage is maintained at high or low levels through controlled periodic action rather than continuous current flow, reducing overall current consumption while maintaining voltage stability during active periods.
2Speed
If a small value pull-up resistor is used to speed up the rise time of the bias voltage, then the switching speed improves, but the current consumption increases significantly
Solution Approach 1:
The patent uses dynamically controlled transistor switches instead of a fixed resistor to achieve fast rise time. The PMOS transistors in the voltage pull-up circuit can be activated to provide a low-impedance path for fast voltage rise when needed, then deactivated to minimize current consumption during stable high voltage periods, achieving both fast switching and low power consumption.
Solution Approach 2:
The patent changes the effective resistance parameter dynamically by using transistor switching. When fast rise time is needed, the transistors are activated to provide a low resistance path; when voltage stability is needed, the transistors are deactivated to present a high impedance state. This dynamic parameter change allows the circuit to achieve fast switching without the continuous current consumption associated with a small fixed resistor.
3Quantity of substance
If multiple bonding pads are connected together to increase memory density, then the memory capacity increases, but the total capacitance increases leading to longer charge times and higher current consumption
Solution Approach 1:
The patent segments the control of multiple bonding pads by providing separate voltage pull-up circuits and voltage pull-down circuits for each pad. This allows independent control and charging of each pad's bias voltage, preventing the cumulative capacitance effect from affecting all pads simultaneously. Each pad can be charged and discharged independently, maintaining fast switching times even with multiple pads connected.
Solution Approach 2:
The patent implements dynamic control for each bonding pad through individually controlled transistor switching circuits. This allows the system to activate only the necessary pads for operation, reducing the effective total capacitance that needs to be charged at any given time. The dynamic activation of individual pad circuits maintains fast charge times while supporting high memory density through selective pad usage.
4Use of energy by moving object
If the rise time of the bias voltage is extended to reduce current consumption, then the current consumption decreases, but the bonding pad becomes more susceptible to noise coupling from nearby signals
Solution Approach 1:
The patent uses dynamic transistor switching to achieve fast rise time only when needed for noise immunity, then transitions to a low-power stable state. The rapid voltage transition minimizes the time the bias voltage spends in intermediate states where noise coupling could affect the bonding pad, while the stable high or low voltage states provide noise immunity. This dynamic approach achieves both low current consumption and noise resistance.
Solution Approach 2:
The patent implements rapid voltage transitions that quickly skip through the vulnerable intermediate voltage range where noise coupling could trigger unintended receiver activation. By rushing through the transition period as quickly as possible using activated pull-up transistors, the circuit minimizes exposure to noise while maintaining low overall current consumption through the stable end states.
Data Source
AI summary
In an aspect, the disclosure is directed to an electrical circuit which includes not limited to: a first bonding pad having a bias voltage, a voltage pull-up circuit configured to set the bias voltage of the first bonding pad to a high voltage, a voltage pull-down circuit configured to switch bias voltage of the first bonding pad from the high voltage to a low voltage in response to the voltage pull-down circuit receiving a first control signal which activates the voltage-pull down circuit, a rise time delay control circuit configured to control a rise time of the bias voltage of the first bonding pad, wherein the bias voltage of the first bonding pad starts to rise in response to the first control signal deactivating the voltage pull-down circuit, and a driving circuit configured to drive a second control signal to activate the driving circuit.


