Bonding Pad Induction Structure for Capacitance Reduction

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Solution Overview

Problem

Conventional semiconductor bonding pad structures experience signal loss and reduced noise immunity due to parasitic capacitance between bonding wires and substrates, which affects the performance of high-speed devices.

Innovation Solution

A bonding pad structure with a connection structure and an induction structure that includes coil-shaped metal layers, where the induction structure is positioned between the connection structure and the substrate to reduce effective capacitance, utilizing dielectric-filled spaces and compatible with CMOS processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple metal layers are used in bonding pads to prevent peel-off and ensure reliability, then bonding pad reliability is improved, but parasitic capacitance between metal layers and substrate increases

Engineering Contradiction:
Improvebonding pad reliabilityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a dielectric material as an intermediary substance between the bonding pad metal layers and the substrate. This dielectric layer acts as a mediator that electrically isolates the bonding pad structure from the substrate, thereby reducing parasitic capacitance while preserving the multi-layer metal structure's mechanical reliability and peel-off resistance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bonding pad structure is segmented into distinct functional layers: multiple metal layers for electrical connection and reliability, separated from the substrate by a dielectric layer. This segmentation allows each layer to perform its specific function independently - the metal layers provide mechanical strength and electrical connectivity, while the dielectric layer provides electrical isolation to minimize parasitic capacitance.

Inventive Principle:
Principle #1Segmentation

2Speed

If bonding pads are designed for high-speed signal transmission, then signal transmission speed is improved, but signal loss due to effective capacitance increases

Engineering Contradiction:
Improvesignal transmission speedVSAvoidsignal loss
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent converts the potentially harmful effect of close proximity between bonding pads and substrate (which would increase capacitance) into a beneficial configuration by introducing the dielectric layer. This allows the bonding pad structure to maintain its compact design for high-speed signaling while the dielectric material transforms the capacitive coupling into a controlled, reduced-capacitance interface, thereby reducing signal loss.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Area of stationary object

If bonding pads are positioned close to substrate to reduce area, then chip area is reduced, but noise immunity against substrate decreases

Engineering Contradiction:
Improvechip areaVSAvoidnoise immunity
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The dielectric material serves as a noise-isolating intermediary between the bonding pads and the substrate. This intermediary layer provides electrical isolation that prevents noise coupling from the substrate to the bonding pads, thereby maintaining noise immunity even when the bonding pads are positioned close to the substrate for area efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The bonding pad structure effectively reduces signal loss and improves noise immunity by lowering the effective capacitance between bonding wires and substrates, maintaining performance and compatibility with existing fabrication processes.

Implementation Method 1

The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS7479698B2Bonding pad structure disposed in semiconductor device and related method
Publication Date: 2009.01.20 FARADAY TECH CORP
  • US7479698B2 patent drawing
  • US7479698B2 patent drawing
  • US7479698B2 patent drawing

AI summary

The present invention discloses a bonding pad structure disposed in a semiconductor device and a method for forming the bonding pad structure. The semiconductor device includes a substrate. The bonding pad structure includes a connection structure and an induction structure. The connection structure allows for a direct connection with a bonding wire. The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate.