Semiconductor Bonding Pad Structure with Stress Relief Layer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices are scaled down, the wire bonding process becomes more challenging due to increased stress and reduced space, leading to issues with the integrity and rigidity of conventional bonding pad structures, particularly in areas neighboring the bonding ball where high stress occurs.

Innovation Solution

The introduction of a circuit under pad structure with fewer or no vias between layers, featuring a top interconnect dielectric layer and pattern that avoids overlapping with the high stress region around the bonding ball, reducing the Poisson effect during wire bonding and pulling tests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the minimum feature size of integrated circuits is reduced to scale down devices, then the integration density is improved, but the wire bonding process becomes more challenging due to increased stress and reduced space

Engineering Contradiction:
Improveintegration densityVSAvoidwire bonding integrity
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The bonding pad structure is segmented into multiple functional layers including a passivation layer, a stress relief layer, and an underlying circuit layer. This segmentation allows each layer to perform its specific function independently, with the stress relief layer specifically designed to mitigate stress during wire bonding while maintaining high integration density in the underlying circuits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The stress relief layer is strategically positioned only in the high-stress region surrounding the bonding ball, specifically within a radial distance of 2.5 μm to 5 μm from the bonding ball center. This localized application provides stress relief precisely where needed without compromising the overall structural integrity or increasing the total device area.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If conventional bonding pad structures are used with circuits underneath, then space is reduced, but the Poisson effect occurs during wire bonding causing stress in the bonding pad region

Engineering Contradiction:
Improvebonding pad areaVSAvoidbonding pad structural stability
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The stress relief layer acts as an intermediary between the bonding ball and the underlying rigid circuit structures. This intermediate layer absorbs and distributes the mechanical stress generated during wire bonding, preventing the Poisson effect from propagating to the bonding pad region and maintaining structural stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The stress relief layer changes the mechanical parameters of the bonding pad structure by introducing a layer with different elastic properties. This layer has higher Poisson's ratio and appropriate elastic modulus, which transforms the stress distribution pattern and eliminates the Poisson effect during wire bonding and pulling tests.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the integrity and reduces space requirements, minimizing stress and improving the reliability of the bonding process by eliminating the Poisson effect and ensuring structural stability.

Implementation Method 1

reducing the Poisson effect during wire bonding and pulling tests

Methodology Applied
Scientific EffectPoisson effect: Poisson's Effect

Data Source

PatentUS7253531B1Semiconductor bonding pad structure
Publication Date: 2007.08.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7253531B1 patent drawing
  • US7253531B1 patent drawing
  • US7253531B1 patent drawing

AI summary

The invention provides a bonding pad structure. At least one lower circuit layer is disposed overlying the substrate, wherein the lower circuit layer is a layout of circuit under pad. A top circuit layer is disposed overlying the lower circuit layer, wherein the top circuit layer comprises a top interconnect dielectric layer and a top interconnect pattern in the top interconnect dielectric layer. A top connecting layer is disposed overlying the top circuit layer, electrically connecting the top interconnect pattern. A top pad layer is disposed overlying the top connecting layer. A bonding ball is disposed overlying the top pad layer, wherein sides of the top interconnect pattern do not overlap a region extending inwardly and outwardly from a boundary of the bonding ball within distance of about 2.5μm.