Bonding Pad Structure With Thin Dielectric for Wafer Thermal Conduction

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Solution Overview

Problem

Current wafer-to-wafer bonding technologies face challenges in achieving efficient thermal conduction and reducing device thickness while maintaining effective electrical connections and surface planarity.

Innovation Solution

A bonding structure and method involving the formation of a thinner surface dielectric layer with planarization stop layers and bonding pads, which allows for improved thermal conduction and reduced device thickness, and includes the use of bonding pads for direct bonding or hybrid bonding of device structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a conventional thickness of surface dielectric layer is used, then surface planarity is maintained, but thermal conduction efficiency is reduced and device thickness is increased

Engineering Contradiction:

Improvethermal conduction efficiencyVSAvoiddevice thickness

Core Design Contradiction:

TemperatureVSLength of stationary object

Solution Approach 1:

The patent changes the thickness parameter of the surface dielectric layer from conventional dimensions to a reduced thickness (e.g., 1-10 micrometers), which fundamentally alters the thermal conduction path length and improves thermal efficiency while reducing overall device thickness

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures including the surface dielectric layer combined with bonding pads and stop layers, where each material is strategically selected and positioned to optimize both thermal conduction and structural integrity in the thinned configuration

Inventive Principle:

Principle #40Composite materials

2Temperature

If the surface dielectric layer is thinned to improve thermal conduction, then thermal performance is enhanced, but manufacturing precision requirements increase

Engineering Contradiction:

Improvethermal conduction efficiencyVSAvoidsurface planarity control

Core Design Contradiction:

TemperatureVSManufacturing precision

Solution Approach 1:

The patent segments the surface dielectric layer formation into multiple controllable steps including deposition of the dielectric layer, formation of stop layers at specific thicknesses, and selective removal processes, allowing precise control of the final thin layer thickness and surface planarity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by forming stop layers within the dielectric layer before final thinning operations, which serve as etch stops and planarity references to guide subsequent processing steps and ensure consistent thickness control

Inventive Principle:

Principle #10Preliminary action

3Reliability

If bonding pads are used for direct or hybrid bonding, then electrical connections are maintained, but device complexity increases

Engineering Contradiction:

Improveelectrical connection effectivenessVSAvoidbonding structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The bonding pads serve multiple functions simultaneously: they provide electrical connections between bonded wafers, act as thermal conduction paths, and serve as alignment references during the bonding process, thereby maintaining reliability while avoiding the need for separate dedicated structures for each function

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances thermal performance and reduces device thickness by enabling efficient thermal conduction and improved surface planarity, while maintaining effective electrical connections through direct or hybrid bonding.

Implementation Method 1

Through the use of a planarization stop layer, the thickness of the surface dielectric layer can be reduced. This can provide increased thermal conduction across the surface dielectric layer

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

In fusion bonding, an oxide surface of a wafer is bonded to an oxide surface or a silicon surface of another wafer

Methodology Applied

Scientific EffectFusion bonding:

Implementation Method 3

In direct metal-to-metal bonding, two metal pads are pressed against each other at an elevated temperature, and the inter-diffusion of the metal pads causes the bonding of the metal pads

Methodology Applied

Scientific EffectDirect metal bonding:

Implementation Method 4

In hybrid bonding, the metal pads of two wafers are bonded to each other through direct metal-to-metal bonding, and an oxide surface of one of the two wafers is bonded to an oxide surface or a silicon surface of the other wafer

Methodology Applied

Scientific EffectHybrid bonding:

Data Source

PatentUS12119318B2Bonding structure and method of forming same

Publication Date: 2024.10.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A device includes an interconnect structure over a substrate, multiple first conductive pads over and connected to the interconnect structure, a planarization stop layer extending over the sidewalls and top surfaces of the first conductive pads of the multiple first conductive pads, a surface dielectric layer extending over the planarization stop layer, and multiple first bonding pads within the surface dielectric layer and connected to the multiple first conductive pads.