Bonding Pad Trench Capacitor Layout to Reduce Parasitic Capacitance

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Solution Overview

Problem

The presence of a thick metal interconnect between a trench capacitor and a bonding structure in integrated chips increases parasitic capacitance, leading to reduced performance and increased cost, particularly affecting conversion gain and noise in photodetectors.

Innovation Solution

Integrating the trench capacitor within the bonding structure and removing the thick metal interconnect reduces parasitic capacitance by minimizing the current path length and material usage, thereby improving performance and reducing production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a thick metal interconnect is used between the trench capacitor and bonding structure, then the mechanical strength and electrical connectivity are improved, but the parasitic capacitance increases leading to reduced conversion gain and increased noise

Engineering Contradiction:
Improvemechanical strengthVSAvoidparasitic capacitance
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent removes the thick metal interconnect from the signal path between the trench capacitor and bonding structure. Instead, a thin metal interconnect or conductive via is used, which significantly reduces parasitic capacitance while maintaining sufficient mechanical strength through alternative support structures and bonding techniques.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions from a planar metal interconnect to a vertical via structure, changing the dimensional orientation of the electrical connection. This vertical arrangement minimizes the horizontal footprint and reduces the overlapping area that contributes to parasitic capacitance, while maintaining electrical connectivity through the bonding structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a thick metal interconnect is used, then electrical connectivity is improved, but the conversion gain is reduced and noise is increased in photodetectors

Engineering Contradiction:
Improveelectrical connectivityVSAvoidconversion gain
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The thick metal interconnect is extracted from the signal path to eliminate its harmful capacitive effect. The remaining thin interconnect or via provides sufficient electrical connectivity for the application, and the removal of the thick metal layer directly reduces parasitic capacitance, thereby improving conversion gain and reducing noise in photodetector circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If a thick metal interconnect is used, then electrical connectivity is improved, but the production cost increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidproduction cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces the expensive thick metal interconnect with a simpler, thinner metal interconnect or conductive via structure. This substitution uses less expensive materials and requires fewer manufacturing steps, thereby reducing production cost while maintaining adequate electrical connectivity for the device's operational requirements.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Measurement precision

If the trench capacitor is integrated within the bonding structure, then parasitic capacitance is reduced and performance is improved, but the device complexity increases

Engineering Contradiction:
Improveconversion gainVSAvoidstructure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The trench capacitor is merged with the bonding structure, integrating two previously separate components into a unified structure. This integration eliminates the need for separate thick metal interconnects, reduces parasitic capacitance, and improves conversion gain. The combined structure achieves multiple functions (capacitance and bonding) in a single element, offsetting the initial design complexity with long-term performance benefits.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20260068652A1Capacitor in bonding structure
Publication Date: 2026.03.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260068652A1 patent drawing
  • US20260068652A1 patent drawing
  • US20260068652A1 patent drawing

AI summary

An integrated chip includes a first chip and a second chip bonded to the first chip. The first chip includes a first substrate, a first transistor along the first substrate, a first interconnect over the first transistor, and a first bonding pad over the first interconnect. The second chip includes a second substrate, a second transistor along the second substrate, a second interconnect under the second transistor, and a second bonding pad under the second interconnect. The second bonding pad is bonded to the first bonding pad. The first chip further includes a trench capacitor over the first interconnect and under the first bonding pad. The trench capacitor includes a bottom electrode, a top electrode, and an insulator layer between the bottom and top electrodes. The first bonding pad extends from the second bonding pad to the top electrode of the trench capacitor.