Semiconductor Bonding Substrate Structure for Solder Cavity Suppression

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Solution Overview

Problem

Solder shrinkage cavities occur during the bonding of semiconductor elements to substrates, leading to reduced heat radiation properties and electrical characteristics, particularly in high-temperature and high-current-density applications, necessitating a solution to suppress cavity formation and improve heat radiation.

Innovation Solution

A semiconductor element bonding substrate with a metal pattern featuring concave or grooved regions near the edge of the bonding area, where the solder is supplied and clotted, and varying heights or conductivities to control solder shrinkage, thereby reducing shrinkage cavities and enhancing heat radiation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-eutectic solder is used for bonding semiconductor elements to insulating substrates, then high reliability is secured, but solder shrinkage cavities easily occur

Engineering Contradiction:
Improvebonding reliabilityVSAvoidsolder shrinkage cavity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The metal pattern is designed with a three-dimensional structure featuring a first region (center) and a second region (periphery) with different heights. This local quality differentiation controls solder flow and solidification patterns, preventing shrinkage cavities while maintaining bonding reliability with non-eutectic solder

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention transitions from a conventional planar metal pattern to a three-dimensional structure with varying heights. The first region protrudes higher than the second region, creating a stepped configuration that guides solder distribution and prevents cavity formation during solidification

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If solder shrinkage cavity occurs immediately below semiconductor element, then heat radiation property is reduced, but it leads to reduction in electrical characteristics

Engineering Contradiction:
Improveheat radiation propertyVSAvoidelectrical characteristics
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The differentiated height structure creates zones with different thermal and mechanical properties. The first region provides superior heat radiation due to better solder contact, while the second region controls shrinkage behavior, thereby maintaining both thermal and electrical characteristics

Inventive Principle:
Principle #3Local quality

3Reliability

If shrinkage cavity occurs in solder, then heat radiation property and electrical characteristics are reduced, but it requires melting solder again or discarding element, reducing productivity

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidmanufacturing productivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The three-dimensional metal pattern structure is prepared in advance to preemptively control solder solidification behavior. The height-differentiated design pre-establishes pathways for solder flow and shrinkage, preventing cavity formation before it occurs and eliminating the need for remelting or discarding

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention converts the natural solder shrinkage phenomenon from a harmful effect into a beneficial one by designing the metal pattern to guide shrinkage away from the semiconductor element contact area. The second region's lower height allows controlled shrinkage that does not compromise the bonding quality or create cavities

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses solder shrinkage cavities, improving heat radiation properties and maintaining stable operation in semiconductor devices, especially those using wide bandgap semiconductors like SiC and GaN.

Implementation Method 1

When the melted solder is clotted, the solder filling the inner side of the concave part shrinks

Methodology Applied
Scientific EffectPhase change (solidification): Phase Change

Data Source

PatentUS20260047465A1Semiconductor element bonding substrate, semiconductor device, and power conversion device
Publication Date: 2026.02.12 MITSUBISHI ELECTRIC CORP
  • US20260047465A1 patent drawing
  • US20260047465A1 patent drawing
  • US20260047465A1 patent drawing

AI summary

A semiconductor element bonding substrate according to the present invention includes an insulating plate, and a metal pattern bonded to a main surface of the insulating plate. A main surface of the metal pattern on an opposite side of the insulating plate includes a bonding region to which a semiconductor element is bonded by a solder. The metal pattern includes at least one concave part located in the main surface. The at least one concave part is located closer to an edge of the bonding region in relation to a center part of the bonding region in the bonding region.