Boolean Satisfiability Solver for Microprocessor Test Case Generation

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Solution Overview

Problem

Current methods for verifying the functionality of advanced microprocessors are inefficient in identifying and testing special or interesting cases that deviate from typical outcomes, leading to resource-intensive and labor-heavy design verification processes.

Innovation Solution

A method and system that uses a Boolean Satisfiability Solver to identify special cases within an instruction set architecture by computing the size of the input space and interesting case space, determining a special case fraction, and adjusting a random test generator to increase the probability of generating these special cases, thereby ensuring they are exercised more frequently during testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If random test generators are used to generate test cases, then the testing process is simple and automated, but special or interesting cases are unlikely to be identified and tested sufficiently

Engineering Contradiction:
Improveautomation of test case generationVSAvoiddetection of special cases
Core Design Contradiction:
Extent of automationVSReliability

Solution Approach 1:

The system performs preliminary analysis by computing the input space size and interesting case space size before actual testing. It calculates the special case fraction in advance to determine whether random testing is sufficient, allowing special cases to be identified and prioritized before the verification process begins.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from the calculated special case fraction to adjust the testing strategy. When the fraction indicates that special cases are rare, the system modifies the test generation approach to intentionally include these cases, creating a feedback loop that adapts the testing process based on quantitative analysis.

Inventive Principle:
Principle #23Feedback

2Reliability

If a large number of test cases are generated and executed, then coverage of the instruction set architecture increases, but the time and resources required for verification increase significantly

Engineering Contradiction:
Improveverification coverageVSAvoidverification time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system changes the parameter of test case selection from purely random to informed selection based on calculated fractions. By computing the ratio of interesting case space to input space, the system adjusts the testing parameters to prioritize cases that provide maximum verification value, reducing unnecessary testing while maintaining coverage.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of exhaustively testing all possible input combinations, the system applies partial action by focusing testing resources on the most critical cases identified through fraction calculation. This selective approach verifies sufficient coverage without the excessive time cost of complete enumeration.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If manual test case generation is used, then special cases can be identified, but the process becomes labor-intensive and time-consuming

Engineering Contradiction:
Improveidentification of special casesVSAvoidverification efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs self-service by automatically computing the input space size, interesting case space size, and special case fraction without requiring manual analysis. The formal methods and automated calculation tools enable the system to identify special cases independently, eliminating the need for labor-intensive manual verification while maintaining high reliability in special case identification.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11853195B2Methods and systems to discover special outcomes in an instruction set architecture via formal methods
Publication Date: 2023.12.26 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11853195B2 patent drawing
  • US11853195B2 patent drawing
  • US11853195B2 patent drawing

AI summary

A method, computer program product, and/or system is disclosed for identifying special cases for testing an integrated circuit that includes defining interesting cases, preferably by a user; obtaining an instruction from an instruction set architecture (ISA); determining that there is an interesting case for the obtained instruction; computing (i) a size of the input space (I0) of the ISA, and (ii) an interesting case space (Ii) which is an input space leading to the interesting case for the obtained instruction; obtaining a special case fraction by dividing the interesting case space (Ii) by the input space (I0); determining a special case fraction (Ii)/(I0) is less than a threshold; and identifying, in response to the special case fraction being less than the threshold, the interesting case as a special case. In an approach the special case is documented.