Boolean Share Decomposition for Low-Overhead Mod 44 in Dilithium

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Solution Overview

Problem

Existing cryptographic solutions for Dilithium, a post-quantum digital signature scheme, are inefficient and complex due to the lack of an effective method to compute mod 44 on Boolean shares, leading to increased implementation and verification overhead across different security levels.

Innovation Solution

A method for computing mod 44 on Boolean shares using basic bit manipulation operations such as shifting and standard Boolean masked addition/subtraction, reducing the complexity and overhead by integrating a sequence of congruences and conditional additions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional methods are used to compute mod 44 on Boolean shares, then security is maintained, but implementation complexity and overhead increase

Engineering Contradiction:
ImprovesecurityVSAvoidimplementation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the Boolean share input into multiple portions (e.g., first portion, second portion, third portion) and processes each segment separately through a sequence of congruences. This segmentation allows the complex mod 44 operation to be broken down into manageable steps that can be executed efficiently while maintaining security properties.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate values and intermediate congruence operations as mediators between the input Boolean shares and the final mod 44 result. These intermediaries facilitate the computation by providing structured steps that simplify the overall operation while preserving security.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If conventional methods are used to compute mod 44 on Boolean shares, then correctness is ensured, but code size and verification overhead increase

Engineering Contradiction:
Improvecomputational correctnessVSAvoidcode size
Core Design Contradiction:
Manufacturing precisionVSLoss of substance

Solution Approach 1:

The patent changes the computational parameters by using a specific sequence of congruences with carefully chosen moduli (e.g., 3, 4, 11, 13, 37, 41) that are more efficient for implementation than conventional approaches. This parameter optimization reduces code size while ensuring computational correctness through mathematical properties of the congruence system.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary computations and pre-computes certain intermediate values that simplify the main mod 44 operation. By preparing these intermediate results in advance using efficient congruence relations, the overall code size is reduced while maintaining correctness.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If basic bit manipulation operations are used, then implementation overhead is reduced, but computational efficiency may be compromised

Engineering Contradiction:
Improveimplementation overheadVSAvoidcomputational efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent replaces complex mechanical arithmetic operations with basic bit manipulation operations (shifts, masks, and simple additions). This substitution leverages the efficiency of bit-level operations in hardware and software, reducing implementation overhead while maintaining or improving computational efficiency through optimized bit-wise congruence calculations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20250286740A1Decomposition of masked values
Publication Date: 2025.09.11 NXP BV
  • US20250286740A1 patent drawing
  • US20250286740A1 patent drawing
  • US20250286740A1 patent drawing

AI summary

The disclosure relates to decomposition of masked values in a cryptographically secure digital signing system. Example embodiments include a method of decomposing mod 44 an N bit Boolean share input (b′B,k), where N>12, the method comprising: i) reducing (302-305) a number of bits in the Boolean share input (b′B,k) by adding a lower 11:0 bits of the input (b′B,k) to an upper portion of the input left shifted by 2 bits to provide a first intermediate result (t1B,13) having M bits; ii) reducing (306-309) a number of bits of the first intermediate result (t1B,13) by adding a lower 6:0 portion of the intermediate result to an upper portion left shifted by 2 bits and subtracted from a multiple of 44 to provide a second intermediate result (t3B,8); and iii) adjusting (310-316) the second intermediate result (t3B,8) by adding and/or subtracting 44 to provide an output (w1B,k′) having a value within an interval of 0:43, the output (w1B,k′) being a mod 44 representation of the input (b′B,k).