In-Chip Boost Converter Inductor Integration
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Solution Overview
Problem
Current flash memory charge pumps face inefficiencies in generating high voltages for write/erase operations, consuming more current despite lower supply voltages, and struggle to accommodate spiral inductors in densely packed memory chips, impacting power conversion efficiency and chip size.
Innovation Solution
A non-volatile memory system with an in-chip boost converter featuring an inductor disposed in metal layers, where two memory structures are bonded together to align and integrate the inductor, enhancing power conversion efficiency while fitting within the constraints of smaller memory chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If spiral inductors are used in flash memory charge pumps, then power conversion efficiency is improved, but chip area increases and density decreases
Solution Approach 1:
The patent transitions from planar 2D inductor layouts to 3D stacked inductor structures by bonding multiple memory structures together. This vertical stacking allows the inductor to occupy the third dimension (height), significantly increasing the effective inductor area without increasing the chip footprint, thereby maintaining high power conversion efficiency while preserving chip density.
Solution Approach 2:
The patent embeds the inductor structure within the memory chip architecture by integrating it with memory cells and control circuitry. The inductor is formed using metal layers that are part of the existing memory structure, nesting the power conversion function within the memory array rather than adding separate discrete components.
2Use of energy by moving object
If higher supply voltages are used, then less current is consumed, but voltage generation circuits become more complex
Solution Approach 1:
The patent combines the charge pump circuitry with the memory array structure, integrating voltage generation functions directly into the memory cells. By merging the inductor formation with existing metal layers and combining control circuitry with memory structure elements, the design reduces overall circuit complexity while enabling efficient high-voltage generation.
Solution Approach 2:
The memory structure serves multiple functions simultaneously: it stores data in the memory cells and generates high voltages through the integrated charge pump. The metal layers serve both as interconnects for memory operations and as inductor components for voltage generation, eliminating the need for separate dedicated voltage generation circuits.
3Use of energy by moving object
If inductors are integrated into memory chips, then power conversion efficiency improves, but manufacturing alignment precision requirements increase
Solution Approach 1:
The patent divides the inductor structure into segments located in different memory structures that are bonded together. Each segment can be manufactured and aligned independently within its own structure, reducing the cumulative alignment tolerance requirements compared to forming a single large inductor in one structure. The segmentation allows for modular manufacturing with relaxed precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high power conversion efficiency and reduces power consumption during write/erase operations, accommodating larger inductance per unit area within the memory chip, thereby improving overall memory performance.
Implementation Method 1
the first and second metal layers are bonded together by a permanent physical bond formed between the first and second metal layers
Implementation Method 2
a boost converter defining an inductor disposed in the first and second metal layers
Data Source
AI summary
Boost converter in memory chip. A non-volatile memory including an in-chip boost converter includes: a first memory structure defines control circuitry disposed on a first substrate, and a first metal layers disposed adjacent the control circuitry, where the first metal layer couples elements of the control circuitry; and a second memory structure defines a memory array disposed on a second substrate, and a second metal layer disposed adjacent the memory array, where the first and second metal layers are bonded together by a permanent physical bond formed between the first and second metal layers; and a boost converter defining an inductor disposed in the first and second metal layers, and a transistor circuit disposed in the control circuitry. The non-volatile memory, where the inductor further defines a first terminal coupled to a voltage source, and a second terminal coupled to a load by way of a transistor circuit.