Boost-by-Deck Memory Programming for Shared Wordline Reliability

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Solution Overview

Problem

Existing memory devices with multiple decks face challenges in maintaining data reliability due to program disturb effects during programming operations, particularly when one deck is already programmed and another is being programmed, as conventional algorithms do not adequately address the impact on unselected memory cells with common wordlines.

Innovation Solution

Implementing a boost-by-deck technique that applies a higher voltage to unselected decks during a seeding phase and electrically disconnects them during an inhibit phase to reduce program disturb effects, ensuring data reliability across multiple decks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional programming algorithms are used on multi-deck memory devices, then programming operations can be performed on multiple decks, but program disturb effects occur on unselected memory cells with common wordlines, reducing data reliability

Engineering Contradiction:
Improvemulti-deck programming capabilityVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The memory device is divided into multiple decks, with each deck having independent wordline sets. This segmentation allows selective programming of specific decks while isolating others, enabling multi-deck operations without interference between decks sharing common wordlines.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different decks based on their programming state. The controller identifies which decks are programmed and applies appropriate voltage levels (e.g., lower voltage to programmed decks, higher voltage to unprogrammed decks) to minimize program disturb effects while maintaining programming effectiveness.

Inventive Principle:
Principle #3Local quality

2Reliability

If higher voltage is applied to unselected decks during seeding phase, then program disturb effects are reduced, but device complexity increases due to voltage control requirements

Engineering Contradiction:
Improvedata reliabilityVSAvoidvoltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller performs preliminary identification of the programmed deck state before initiating programming operations. Based on this preliminary information, it pre-configures the appropriate voltage levels for each deck, avoiding the need for complex real-time voltage adjustments during the programming process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory device includes on-device logic that automatically identifies which decks are programmed and self-regulates the voltage application without requiring complex external controller intervention. This self-service approach simplifies the overall system complexity while maintaining reliable program disturb mitigation.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The boost-by-deck technique enhances data reliability by minimizing program disturb effects on already programmed cells, improving overall memory device performance and reducing errors during multi-deck programming operations.

Implementation Method 1

applying a higher voltage to unselected decks during a seeding phase

Methodology Applied
Scientific EffectVoltage application:

Implementation Method 2

electrically disconnecting the unselected decks during an inhibit phase

Methodology Applied
Scientific EffectElectrical disconnection:

Data Source

PatentUS12542188B2Boost-by-deck during a program operation on a memory device
Publication Date: 2026.02.03 MICRON TECHNOLOGY INC
  • US12542188B2 patent drawing
  • US12542188B2 patent drawing
  • US12542188B2 patent drawing

AI summary

Control logic in a memory device initiates a program operation on a memory array comprising a top deck and bottom deck. During a seeding phase of the program operation, the control logic causes a first positive voltage to be applied to a first plurality of wordlines of the memory array, wherein the first plurality of wordlines is associated with memory cells in the bottom deck of the memory array that are in a programmed state, and causes a ground voltage to be applied to a second plurality of wordlines of the memory array, wherein the second plurality of wordlines is associated with memory cells in the top deck of the memory array. At an end of the seeding phase of the program operation, the control logic electrically separates the top deck from the bottom deck and causes a program voltage to be applied to a selected wordline of the memory array during an inhibit phase of the program operation, wherein the selected wordline is associated with respective memory cells in the top deck of the memory array.