Boost PFC ASIC Pin Reduction via Time-Multiplexed Detection

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Solution Overview

Problem

Boost PFC circuits require multiple pins on an ASIC for detecting various parameters, leading to inefficiencies in pin usage and increased complexity in control and regulation.

Innovation Solution

Combining the detection functions of switch current and zero crossing, or switch current and output voltage, using a single pin by employing decoupling elements like diodes to separate the measurement signals, allowing for simultaneous detection of multiple parameters at different times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple separate pins are used to detect different parameters (switch current, zero crossing, output voltage), then measurement precision is maintained, but device complexity increases due to numerous required pins

Engineering Contradiction:
Improveparameter detection accuracyVSAvoidnumber of ASIC pins
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple parameter detection functions (switch current detection, zero crossing detection, output voltage detection) into a single shared detection pin. The detection pin alternates between measuring different parameters depending on the switching state, thereby reducing the number of required pins while maintaining accurate measurement of all parameters through time-multiplexed detection

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The detection pin is designed to perform multiple functions by detecting different parameters at different times. During switch-on periods, it measures switch current; during switch-off periods, it measures zero crossing or output voltage. This multi-functional approach allows a single pin to replace multiple dedicated detection pins, reducing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If multiple separate detection circuits are implemented for different parameters, then measurement precision is ensured, but ease of operation deteriorates due to complex control and regulation

Engineering Contradiction:
Improveparameter detection accuracyVSAvoidcontrol circuit simplicity
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The patent merges multiple separate detection circuits into a single integrated detection circuit that handles all parameter measurements through one pin. The control unit coordinates the detection of switch current, zero crossing, and output voltage within the same circuit framework, simplifying the overall control architecture while preserving measurement precision through proper timing and signal processing

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If detection functions are combined into a single pin, then device complexity is reduced, but measurement precision may deteriorate due to signal interference

Engineering Contradiction:
Improvenumber of ASIC pinsVSAvoidparameter detection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent employs periodic action by alternating between different detection functions in synchronized intervals. The detection pin measures switch current during switch-on periods and zero crossing/output voltage during switch-off periods. This periodic time-multiplexed detection prevents signal interference between different parameters while maintaining accurate measurement of each parameter in its designated time window

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The control unit acts as an intermediary that coordinates the switching between different detection functions. It manages the timing and signal processing to ensure that measurements of different parameters do not interfere with each other, thereby maintaining measurement precision despite using a shared detection pin

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2011218B1Boost power factor correction circuit (boost PFC)
Publication Date: 2016.09.21 TRIDONIC GMBH & CO KG
  • EP2011218B1 patent drawingFigure 1
  • EP2011218B1 patent drawingFigure 2
  • EP2011218B1 patent drawingFigure 3~4

AI summary

The invention relates to a power factor correction circuit (PFC) comprising a charging coil (LI) with which a storage capacitor is charged with discharge current by a controlled circuit (MI). Said circuit (MI) is switched on and off by an electronic control and regulation device which detects, on an inlet, directly or indirectly, the current through the circuit (MI) at intervals when the circuit (MI) is closed, and detects an additional operational parameter of the boost PFC circuit at intervals when the circuit (MI) is open.