Boosted Gate Voltage for MRAM Programming
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Solution Overview
Problem
Magnetic random access memory (MRAM) cells face a conflict between minimizing cell size and achieving higher programming current, as increasing the size of the access transistor to boost current results in larger cell size and voltage limitations that can damage the transistor.
Innovation Solution
The method involves coupling the magnetoresistive tunnel junction (MTJ) to an access transistor with the gate voltage boosted using a selected word line at a first voltage, and applying additional voltages to unselected bit lines and source lines to increase the programming current while avoiding transistor damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the size of the access transistor is increased to boost programming current, then the programming current is improved, but the MRAM cell size increases
Solution Approach 1:
The patent changes the voltage parameter by applying a boosted voltage (Vdd + Vx) to the gate of the access transistor through a bootstrapping mechanism. This voltage enhancement allows the transistor to deliver higher programming current without increasing its physical size, thereby resolving the contradiction between current strength and cell area.
2Power
If the voltage is increased to increase programming current, then the programming current is improved, but the transistor may be damaged from excessive voltage
Solution Approach 1:
The patent employs periodic voltage application where the boosted voltage (Vdd + Vx) is applied only during the programming operation, while the transistor is protected during other operations. The gate is connected to Vdd through a resistor during normal operation, limiting voltage to safe levels, and only receives the boosted voltage when explicitly programmed, thus preventing damage while enabling high current when needed.
3Productivity
If the programming time is reduced, then the productivity is improved, but the programming current needs to be augmented which increases cell size
Solution Approach 1:
The patent achieves faster programming by changing the voltage parameter to (Vdd + Vx) during programming operations. This voltage boost enables higher current delivery in the same transistor, reducing programming time without requiring larger cell size. The bootstrapping mechanism dynamically provides this voltage enhancement only when needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for faster programming of MRAM cells with increased electric current, maintaining small cell size and preventing transistor damage from excessive voltage.
Implementation Method 1
Electrons passing through the fixed layer of the MTJ and into the free layer of the MTJ force the orientation of the free layer to become the same as that of the fixed layer. Whereas, forcing the electrons to travel from the free layer into the fixed layer, causes the orientation of the fixed layer to remain unchanged, but the bounced electrons from the fixed layer change the orientation of the free layer to be opposite to that of the fixed layer.
Implementation Method 2
A second voltage, Vx, is applied to unselected bit lines (BLs) and further applied to a source line (SL), the SL being coupled to the source of the access transistor. A third voltage, Vdd or 0 Volts, is then applied to a selected BL, the selected BL being coupled to an end of the MTJ other than the end of the MTJ where the access transistor is coupled. The first voltage is applied to a SL, the SL being coupled to the source of the access transistor thereby causing the WL to boot above the first voltage.
Data Source
AI summary
A method of programming an MTJ includes selecting an MTJ that is coupled to an access transistor at the drain of the access transistor. The gate of the access transistor is coupled to a selected word line (WL), the selected WL being substantially at a first voltage, Vdd; whereas the WLs that are not coupled to the MTJ are left to float. A second voltage, Vx, is applied to the unselected bit lines (BLs) and further applied to a source line (SL), the SL being coupled to the source of the access transistor. A third voltage, Vdd or 0 Volts, is applied to a selected BL, the selected BL being coupled the MTJ. The first voltage is applied to a SL, the SL being coupled to the source of the access transistor thereby causing the WL to boot above the first voltage.