Boosted Level Shifter Circuit for Low-Delay High-Voltage Output

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing level shifters face challenges in reducing propagation delay effectively, particularly in switch-mode power supplies, due to the need for high voltage capacitors and synchronization circuitry, which increase manufacturing costs and complexity.

Innovation Solution

The implementation of boost circuitry in high voltage circuitry, which uses the path through low voltage transistors to trigger fast charging of high voltage outputs, eliminating the need for high voltage capacitors and synchronization circuitry, and reducing the size of other components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high voltage capacitors and synchronization circuitry are used to reduce propagation delay, then the speed of signal transmission is improved, but the device complexity and manufacturing cost increase

Engineering Contradiction:
Improvesignal transmission speedVSAvoidcircuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent removes high voltage capacitors and synchronization circuitry from the level shifter design, extracting only the essential low voltage transistor path to achieve fast signal transmission without the complexity and cost of additional high voltage components

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The low voltage transistors in the interface circuit serve dual functions: they both interface between different voltage domains and provide the primary signal transmission path, eliminating the need for separate high voltage capacitors and synchronization circuitry

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of time

If high voltage capacitors are used in the level shifter, then the propagation delay is reduced, but the manufacturing cost increases

Engineering Contradiction:
Improvepropagation delayVSAvoidmanufacturing cost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent replaces expensive high voltage capacitors with inexpensive low voltage transistors that can be easily manufactured using standard CMOS processes, achieving fast signal transmission without the high manufacturing cost of specialized high voltage components

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the voltage parameter of the signal path from high voltage to low voltage by using low voltage transistors, allowing the use of standard, inexpensive manufacturing processes while maintaining fast signal transmission performance

Inventive Principle:
Principle #35Parameter changes

3Reliability

If synchronization circuitry is added to the level shifter, then the signal transmission reliability is improved, but the device complexity increases

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The low voltage transistors in the interface circuit automatically provide synchronized signal transmission to both high voltage outputs without requiring external synchronization circuitry, as the transistors inherently respond to the input signal changes in a coordinated manner

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces propagation delay by quickly pulling up high voltage outputs, simplifies circuit fabrication, and eliminates the need for synchronization circuitry, thereby enhancing the high-speed properties of level shifters.

Implementation Method 1

The first capacitor includes a bottom plate coupled to an input terminal of the second transistor and a top plate coupled to a control terminal of the third transistor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10498315B2Level shifter circuit
Publication Date: 2019.12.03 TEXAS INSTRUMENTS INC
  • US10498315B2 patent drawing
  • US10498315B2 patent drawing
  • US10498315B2 patent drawing

AI summary

A level shifter with reduced propagation delay. A level shifter includes a signal input terminal, a first signal output node, a first transistor, a second transistor, a third transistor, and a first capacitor. The first transistor includes a control terminal coupled to the signal input terminal. The second transistor includes an output terminal coupled to an input terminal of the first transistor. The first capacitor includes a bottom plate coupled to an input terminal of the second transistor. The third transistor includes a control terminal coupled to a top plate of the first capacitor, and an output terminal coupled to the first signal output node.