Boosted NMOS Multiplexer for High-Voltage ADC Crosstalk Control
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Solution Overview
Problem
Conventional multiplexers in high-speed, high-voltage analog-to-digital converter systems face limitations due to the large size and operational speed constraints caused by repetitive switches, which occupy significant area and introduce crosstalk.
Innovation Solution
A multiplexer design incorporating a boost circuit with a negative voltage rail, a positive voltage rail, and a switch network that includes NMOS transistors and CMOS switches, reducing the number of switches and capacitors, and employing a boost circuit to manage voltage during sampling and conversion phases, thereby minimizing area occupation and crosstalk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If switches Q1-1/Q2-1 to Q1-N/Q2-N are made large to reduce input resistance at high frequency operation, then input resistance is improved, but area occupation increases considerably
Solution Approach 1:
The patent combines multiple switch functions into a single switch per channel. Instead of using series switches Q1-1/Q2-1, the invention uses a single switch controlled by select signals that can route between input and output while also providing grounding during conversion phase, thereby reducing area occupation while maintaining the required input resistance characteristics for high-frequency operation
Solution Approach 2:
The single switch in each cell is designed to perform multiple functions: routing the selected input signal to output during sampling phase, and providing grounding connection during conversion phase. This multi-functional design eliminates the need for separate switches, reducing overall area occupation while maintaining proper input resistance characteristics
2Object-generated harmful factors
If series switches Q1-1/Q2-1 to Q1-N/Q2-N are used to reduce crosstalk, then crosstalk is improved, but operating speed of ADC is limited
Solution Approach 1:
The patent merges the crosstalk reduction function with the signal routing function into a single switch structure. By controlling the timing of the single switch through phase-based select signals, the invention achieves crosstalk reduction without the speed limitations imposed by multiple series switches, enabling faster ADC operation
3Object-generated harmful factors
If multiple switches per channel are used to eliminate parasitic capacitance, then crosstalk is reduced, but device complexity increases
Solution Approach 1:
The invention consolidates multiple switch components into a single switch per channel, controlled by phase-based select signals. This merging approach maintains the ability to eliminate parasitic capacitance and reduce crosstalk while significantly simplifying the device structure and reducing overall complexity compared to multi-switch implementations
Data Source
AI summary
A method for digitizing at least a portion of a selected analog input signal of a plurality of analog input signals by using a multiplexer having a plurality of channels is provided. Each channel for the multiplexer is associated with at least one of the analog input signals and is associated with a pair of select signals, and wherein each channel includes a cell having an input terminal, an output terminal, and a boosted NMOS switch. According to the method, a first select signal from each pair of select signals is asserted to decouple the input and output terminals for each cell. A boost capacitor is also charged during the non-sampling or conversion phase while the first select signal from each pair of select signals is asserted. A second select signal that is associated with the selected analog input signal is then asserted so as to couple together the input and output terminals for the cell associated with the selected analog input signal and to provide a voltage stored on the boost capacitor to the associated boosted NMOS switch. The portion of the selected analog input signal is then digitized.