Boosted Signal Receiver Circuit for Balanced DRAM Duty Cycle
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Solution Overview
Problem
In signal receiver circuits of dynamic random access memory (DRAM), high threshold voltage in N-type metal oxide semiconductor (NMOS) transistors leads to current restriction issues, resulting in unbalanced duty cycles due to insufficient drain-source current, particularly when the input voltage VIN is between logic high and low levels.
Innovation Solution
A signal receiver circuit incorporating a transmission gate, a pull-low unit, a boost capacitor, and a voltage division unit, along with a control signal generator, is used to boost the input signal, ensuring a high drain-source current and balancing the duty cycle by controlling the boost capacitor's charging and discharging based on the control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If NMOS transistors with high threshold voltage are used in the signal receiver circuit, then the circuit can operate with standard voltage levels, but the drain-source current becomes insufficient leading to unbalanced duty cycle
Solution Approach 1:
The boost capacitor is pre-charged to a boosted voltage level before the signal reception phase. When the transmission gate turns on, this pre-stored boosted voltage is immediately applied to the gate of the NMOS transistor, providing the necessary high gate-source voltage to drive sufficient drain-source current without waiting for voltage buildup during operation.
Solution Approach 2:
The patent changes the voltage parameter by introducing a boost capacitor that stores a boosted voltage (higher than the standard supply voltage). This boosted voltage is applied to the gate of the NMOS transistor during specific phases, dynamically changing the gate-source voltage parameter to overcome the high threshold voltage limitation and enable sufficient current flow.
2Ease of operation
If the gate-source voltage of the NMOS transistor is restricted by the input voltage level, then the circuit maintains proper signal levels, but the drain-source current is insufficient to support full swing at the inverter input
Solution Approach 1:
The boost capacitor acts as an intermediary element that decouples the input signal level from the gate voltage level. It stores energy at a boosted voltage level and releases it to the transistor gate, serving as a mediator that allows the transistor to operate at higher voltage levels than the input signal provides, thereby enabling sufficient current flow while maintaining proper input signal levels.
Solution Approach 2:
The boost capacitor is pre-charged to a voltage higher than the input signal voltage before the transistor needs to conduct. This preliminary charging action stores the necessary energy in advance, allowing the transistor to receive adequate gate voltage for full current swing without being limited by the restricted input voltage level.
3Duration of action of stationary object
If the duty cycle of the output voltage is unbalanced, then the circuit operation continues, but the output signal cannot achieve proper logic level transitions
Solution Approach 1:
The circuit employs periodic control signal transitions that work in conjunction with the boost capacitor to create balanced duty cycles. The control signal periodically activates the transmission gate and adjusts the transistor operation, allowing the output to achieve proper logic high and logic low levels with balanced timing durations through the periodic charging and discharging of the boost capacitor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively boosts the input signal, improving the duty cycle from 20%/80% to 50%/50%, addressing the current restriction and voltage reduction issues caused by leakage current, thereby achieving a balanced output.
Implementation Method 1
a boost capacitor (203) having a first terminal coupled to the first node and a second terminal coupled to a second node
Data Source
AI summary
A signal receiver circuit including a transmission gate, a pull-low unit, a boost capacitor, a voltage division unit, and a receiver unit is provided. The transmission gate determines whether to conduct an input signal according to a control signal. The pull-low unit determines whether to pull down the voltage at a terminal of the boost capacitor according to the control signal. The boost capacitor boosts the input signal of the receiver unit. The voltage division unit sends a divided voltage to another terminal of the boost capacitor according to the control signal. When an input signal is received, the boost capacitor boosts the input signal, for overcoming low current issue caused by high threshold voltage of MOS transistors and accordingly the receiver unit achieves full swing.