Single Booster Antenna for Multi-Chip RFID Range Extension
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Solution Overview
Problem
Conventional chip arrangements with booster antennas require significant space due to the need for multiple booster antennas to achieve long-range communication and energy transmission with multiple chips, making them bulky and costly.
Innovation Solution
A chip arrangement where a single booster antenna is inductively or capacitively coupled to multiple chips' antennas, allowing for extended communication range without the need for separate booster antennas for each chip, thus optimizing space and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple booster antennas are used for multiple chips, then long-range communication and energy transmission are achieved, but the space requirement increases considerably
Solution Approach 1:
The patent merges multiple booster antenna functions into a single shared booster antenna that serves multiple chips. This is achieved by positioning the single booster antenna to inductively or capacitively couple with multiple chip antennas simultaneously, enabling one antenna structure to perform the function of multiple separate booster antennas would otherwise be needed.
Solution Approach 2:
The single booster antenna is designed with multi-functionality to support multiple chips with different antenna configurations. It can inductively couple with loop antennas, capacitively couple with dipole antennas, or provide magnetic coupling with various antenna types, making it a universal solution that adapts to different chip designs while maintaining long-range communication capability.
2Use of energy by moving object
If multiple booster antennas are used for multiple chips, then effective energy transmission is achieved, but the device complexity and cost increase
Solution Approach 1:
The patent combines multiple energy transmission functions into a single booster antenna structure that can simultaneously or sequentially provide energy to multiple chips through inductive, capacitive, or magnetic coupling mechanisms, thereby reducing the number of separate energy transmission components needed.
Solution Approach 2:
The system enables chips to autonomously receive energy from the shared booster antenna through their respective antenna coupling mechanisms without requiring separate dedicated energy transmission paths for each chip, allowing the system to self-manage energy distribution efficiently.
3Area of stationary object
If a single booster antenna is shared by multiple chips, then space is optimized, but the coupling complexity between the booster antenna and multiple chip antennas increases
Solution Approach 1:
The patent applies different coupling mechanisms at different locations around the single booster antenna to accommodate various chip antenna types. Inductive coupling is implemented at certain positions for loop antennas, while capacitive coupling is positioned at other locations for dipole antennas, allowing each local region to be optimized for its specific coupling requirement.
Solution Approach 2:
The system dynamically switches between different coupling modes (inductive, capacitive, magnetic) depending on the chip type and antenna configuration being activated. This dynamic adaptation allows the single booster antenna to efficiently couple with different chip designs without requiring permanent complex coupling structures for all possible configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables a compact and cost-effective design for chip arrangements to communicate over long ranges, reducing the physical space required for multiple chips while maintaining effective energy transmission and data exchange.
Implementation Method 1
A chip arrangement (10) has a first chip (14) having a first antenna (16) which is monolithically integrated in the first chip (14) and is intended to communicate with at least one of an external reader or an external writer; a second chip (18) having a second antenna (20) which is monolithically integrated in the second chip (18) and is intended to communicate with the at least one of the external reader or the external writer; and a booster antenna (22) which is coupled to the first antenna (16) in a first coupling area (24) in order to increase a range of the first antenna (16) and is coupled to the second antenna (20) in a second coupling area (28) in order to increase a range of the second antenna (20).
Implementation Method 2
A chip arrangement where a single booster antenna is inductively or capacitively coupled to multiple chips' antennas, allowing for extended communication range without the need for separate booster antennas for each chip
Data Source
AI summary
In various embodiments, a chip arrangement includes a first chip having a first antenna which is monolithically integrated in the first chip and is intended to communicate with at least one of an external reader or an external writer; a second chip having a second antenna which is monolithically integrated in the second chip and is intended to communicate with the at least one of the external reader or the external writer; and a booster antenna which is coupled to the first antenna in a first coupling area in order to increase a range of the first antenna and is coupled to the second antenna in a second coupling area in order to increase a range of the second antenna.