Booster Circuit Noise Reduction via Constant Current Source
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Solution Overview
Problem
Conventional booster circuits for flash memories experience high frequency noise due to rapid current changes during transistor transitions, which reduces operating margins for other semiconductor devices.
Innovation Solution
A semiconductor integrated circuit configuration that includes a first and second transistor connected in series, with a current source connected in series with at least one inverter, allowing for controlled switching between conductive and non-conductive states through a constant current source, reducing high frequency noise by adjusting the charge quantity at the output node.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the current capability of transistors is increased to ensure sufficient margin for charge transfer time period, then boosting efficiency is improved, but high frequency noise increases due to rapid current changes
Solution Approach 1:
The patent applies dynamics by making the transistor current capability adjustable rather than fixed. The driver circuit's transistor current capability is dynamically changed based on operating conditions to balance boosting efficiency and noise reduction. This allows the system to optimize performance for different scenarios rather than being constrained by a fixed design point.
Solution Approach 2:
The patent changes the parameter of transistor current capability to resolve the contradiction. By adjusting the current capability parameter of the driver circuit transistors, the system can achieve sufficient charge transfer margin while controlling the rate of current change to reduce high frequency noise generation.
2Object-generated harmful factors
If inverter circuit sizes are adjusted to extend transition time period, then high frequency noise is reduced, but rise time and fall time of output voltage are affected
Solution Approach 1:
The patent changes the parameter of inverter circuit size to control the transition characteristics. By properly sizing the inverter circuits, the system extends the transition time period of the driver circuit transistors, which reduces the rate of current change and thereby reduces high frequency noise while maintaining acceptable rise and fall times.
Solution Approach 2:
The patent uses dynamics by adjusting the inverter circuit characteristics to control the timing behavior. The inverter circuits are designed with specific size parameters that dynamically control the transition speed, allowing the system to balance noise reduction requirements with speed requirements.
Data Source
AI summary
A semiconductor integrated circuit includes: a first transistor and a second transistor connected in series between a first voltage and a second voltage; a first inverter configured to control the first transistor; a second inverter configured to control the second transistor; and a current source, wherein the current source is connected in series with at least one of the first inverter or the second inverter.