Booster-Layer Hafnium-Zirconium Stack for High-k Capacitance
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Solution Overview
Problem
The integration of semiconductor memories requires a high-k material with high capacitance and low leakage current, which is limited by the use of zirconium oxide, necessitating new methods to enhance capacitance without increasing leakage current.
Innovation Solution
A semiconductor device with a multi-layered stack including a hafnium oxide layer of tetragonal crystal structure, promoted by a seed layer and a booster layer, which boosts the dielectric constant and reduces leakage current, is fabricated using a low-temperature thermal source layer, avoiding high-temperature crystallization annealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Force
If zirconium oxide is used as a high-k dielectric material to increase capacitance, then the dielectric constant is improved, but the leakage current increases and the capacitance enhancement is limited
Solution Approach 1:
The patent employs a composite dielectric structure consisting of multiple layers: a first high-k dielectric layer (e.g., zirconium oxide), a second high-k dielectric layer (e.g., hafnium oxide), and an intermediate layer between them. This composite structure combines materials with different properties to achieve higher overall capacitance while the intermediate layer acts as a barrier to reduce leakage current, thus resolving the contradiction between increasing dielectric constant and controlling leakage.
2Stability of the object's composition
If high-temperature crystallization annealing is used to form tetragonal hafnium oxide, then the crystal structure and dielectric properties are improved, but neighboring structures are damaged
Solution Approach 1:
The patent introduces a gradient doping profile where the dopant concentration varies through the thickness of the buffer layer, being highest at the interface with the hafnium oxide layer and decreasing toward the opposite side. This parameter variation enables localized control of crystallization, allowing tetragonal phase formation at lower temperatures (below 400°C) exactly where needed, while avoiding high-temperature exposure to surrounding structures.
Solution Approach 2:
The buffer layer is doped with elements (such as silicon, carbon, or oxygen) at non-uniform concentrations, creating local regions with different thermal and crystallization properties. The high-dopant region adjacent to the hafnium oxide promotes low-temperature tetragonal crystallization, while other regions maintain lower doping levels to avoid affecting neighboring structures, thus achieving localized quality control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a high dielectric constant and low leakage current, effectively increasing capacitance while maintaining device integrity, without the need for high-temperature processing that could damage neighboring structures.
Implementation Method 1
forming a thermal source layer over the multi-layered stack to crystallize the initial hafnium oxide layer into tetragonal hafnium oxide
Implementation Method 2
a seed layer for promoting tetragonal crystallization of the hafnium oxide layer and having a tetragonal crystal structure
Data Source
AI summary
A semiconductor device includes: a first electrode; a booster layer over the first electrode; a hafnium-zirconium based layer over the booster layer; and a second electrode over the hafnium-zirconium based layer.