Boot Code Patching via One-Time Programmable Memory
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Solution Overview
Problem
The process of modifying boot code in internal read-only memory (IROM) during a semiconductor system's booting process is time-consuming and costly, requiring extensive resource consumption for code simulation, verification, and remanufacturing of mask Read-Only Memory (ROM).
Innovation Solution
A semiconductor system that includes a nonvolatile memory storing a patch code with a unique identifier, an IROM storing a boot code with a patch code execution function and linked register address, and static random access memory (SRAM) storing a copy of the patch code, where the processor executes the patch code based on a comparison between the unique ID in nonvolatile memory and the linked register address, allowing for execution of the patch code without directly modifying the IROM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the boot code in IROM is modified to fix boot code defects, then the reliability of the booting process is improved, but the manufacturing time and cost increase significantly
Solution Approach 1:
The patent divides the boot code into two segments: the original boot code stored in IROM and a separate patch code stored in nonvolatile memory. This segmentation allows the patch code to be independently modified and applied without remanufacturing the entire IROM, thus fixing boot code defects while avoiding time-consuming remanufacturing processes.
Solution Approach 2:
The patent introduces a patch code as an intermediary element that mediates between the original boot code and the processor. The patch code execution function in the boot code loads and executes the patch code from nonvolatile memory, allowing defect correction without directly modifying the IROM contents, thereby avoiding remanufacturing.
2Reliability
If the boot code in IROM is modified to fix boot code defects, then the reliability of the booting process is improved, but the manufacturing cost increases
Solution Approach 1:
The patent divides the boot code into two segments: the original boot code stored in IROM and a separate patch code stored in nonvolatile memory. This segmentation allows the patch code to be independently modified and applied without remanufacturing the entire IROM, thus fixing boot code defects while avoiding time-consuming remanufacturing processes.
Solution Approach 2:
The patent creates a copy of the patch code in nonvolatile memory that can be independently manufactured and updated. Instead of modifying the original IROM, the system copies the necessary corrections into a separate patch code that is loaded during boot, reducing manufacturing costs by avoiding IROM remanufacturing.
3Reliability
If code simulation and verification are performed for boot code modifications, then the reliability of the modified boot code is improved, but the time and resource consumption increase
Solution Approach 1:
The patent extracts the code verification process from the IROM modification process. Instead of verifying modifications within the IROM itself, the system extracts the verification to be performed on the separate patch code in nonvolatile memory, allowing parallel development and testing without blocking IROM production, thus improving productivity while maintaining reliability.
4Adaptability or versatility
If mask ROM is modified for manufacturing the IROM, then the boot code functionality is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent divides the boot code into two segments: the original boot code stored in IROM and a separate patch code stored in nonvolatile memory. This segmentation allows the patch code to be independently modified and applied without remanufacturing the entire IROM, thus fixing boot code defects while avoiding time-consuming remanufacturing processes.
Solution Approach 2:
The patent introduces dynamic configurability to the boot code system by allowing the patch code to be selectively applied based on comparison between the unique ID and LR address. This dynamic approach enables adaptability without requiring complex manufacturing changes, as the system can flexibly activate or deactivate patch code execution through simple address comparison logic.
Data Source
AI summary
A semiconductor system comprises a nonvolatile memory storing a patch code, the patch code comprising a unique identifier (ID). An internal read only memory (IROM) stores a boot code, the boot code comprising a patch code execution function for executing the patch code and a linked register (LR) address for specifying a storage location where the patch code is to be executed. A static random access memory (SRAM) stores a copy of the patch code at the storage location, the copy of the patch code including the unique ID. A processor executes the copy of the patch code from the storage location. The processor executes the copy of the patch code stored at the storage location in the SRAM according to the comparison result.


