Boot Controller Power Sequencing for Sub-300ms System Startup

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Solution Overview

Problem

Traditional computer boot processes are time-consuming, often taking over 5 seconds, which is undesirable in certain applications where quicker booting capabilities are preferred.

Innovation Solution

A method and system involving a controller that simultaneously powers and sequences the processor, north bridge, and south bridge, and transfers a boot image from non-volatile to volatile memory, enabling rapid booting by initializing volatile memory interfaces and using direct memory access to expedite the boot process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a traditional BIOS boot process is used, then the computer boots up reliably, but the boot time is too long (over 5 seconds)

Engineering Contradiction:
Improveboot timeVSAvoidapplication spawn readiness
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The boot image is pre-loaded into the first volatile memory (e.g., L3 cache or dedicated buffer memory) before the processor needs to execute it. The controller transfers the boot image from non-volatile memory to the first volatile memory during the power-on sequence, so that when the processor initializes and needs the boot image, it is already available in fast memory, dramatically reducing boot time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The boot process is segmented into multiple memory stages: non-volatile memory stores the complete boot image, the first volatile memory (L3 cache or buffer) holds a pre-loaded portion or the entire boot image during transfer, and the second volatile memory (processor working memory) receives the final boot image for execution. This segmentation allows parallel operations and optimizes data flow at each stage.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If multiple components (processor, north bridge, south bridge, controller) are powered on simultaneously, then the boot process is simplified and accelerated, but power sequencing control becomes more complex

Engineering Contradiction:
Improvepower-on sequence timeVSAvoidpower sequencing control
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

A dedicated power management controller serves as an intermediary between the power source and the multiple system components (processor, north bridge, south bridge, controller). This controller manages the power sequencing by selectively enabling power to different components in an optimized sequence or simultaneously, coordinating the power-on events to accelerate boot while maintaining system stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The power management controller autonomously manages the power sequencing of multiple components without requiring complex external coordination. It self-regulates the power distribution timing and sequence, making the complex power management task automatic and reducing the need for external intervention or complex control logic elsewhere in the system.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8909914B2Controller and a method for controlling a boot process
Publication Date: 2014.12.09 RAYTHEON CO
  • US8909914B2 patent drawing
  • US8909914B2 patent drawing
  • US8909914B2 patent drawing

AI summary

A computer, a computer system and a method of booting the computer and computer systems within 300 milliseconds of receiving power. The computer may be configured to simultaneously power sequence a controller, a processor and a chipset. The computer may be further configured to transfer a boot image from a non-volatile memory to a first volatile memory. The controller may be further configured to transfer the boot image from the first volatile memory to a volatile memory associated with the processor using a PCI-Express interface.