Boot Engine Code Shadowing for Non-XIP Memory
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Solution Overview
Problem
Booting from non-XIP memory is complex and time-consuming due to the need for error correction and detection, especially in NAND flash memory, which lacks Execution in Place capability, leading to bit-flipping issues that complicate the booting process.
Innovation Solution
A system and method that utilizes a code shadowing module to shadow error-free parts of booting images or OS images from non-XIP memory to XIP memory, performing error detection and correction on duplicates if necessary, without requiring ECC capabilities, thereby simplifying the hardware and reducing booting time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a boot engine with ECC capabilities is used to handle bit-flipping errors in non-XIP memory, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the ECC (error correction code) functionality from the boot engine by using a separate hardware module that handles error correction independently. This allows the boot engine to focus on code shadowing operations while the error correction is managed by a dedicated module, reducing the overall architectural complexity while maintaining reliability
Solution Approach 2:
The patent introduces an intermediary error correction module that mediates between the non-XIP memory and the boot engine. This intermediary handles the error correction operations separately, allowing the boot engine to operate simpler without directly managing complex ECC operations
2Reliability
If EDC and ECC checks are performed during code shadowing in non-XIP memory, then reliability is improved, but booting time increases
Solution Approach 1:
The patent performs error detection and correction checks during the code shadowing process itself, rather than separately after shadowing. By integrating these checks into the shadowing operation, the system eliminates redundant checking steps and reduces overall booting time while maintaining reliability
Solution Approach 2:
The patent makes the error checking process continuous with the code shadowing operation, allowing both actions to occur simultaneously rather than sequentially. This continuous integration of error detection/correction with code shadowing eliminates idle time and accelerates the booting process
3Productivity
If a hardware boot engine method is used for booting from non-XIP memory, then booting speed is improved, but device complexity increases
Solution Approach 1:
The patent extracts complex error correction functions from the boot engine hardware and places them in a separate dedicated module. This allows the boot engine to maintain high booting speed through hardware acceleration while reducing its own structural complexity by removing the burden of handling complex ECC operations
Data Source
AI summary
A booting system includes: a non-XIP memory, for storing a plurality of booting images, wherein the booting images comprise a source image and a plurality of duplicates of the source image; an XIP memory, coupled to the non-XIP memory; and a code shadowing module, coupled to the non-XIP memory and the XIP memory, for shadowing a specific booting image to the XIP memory if no errors are detected when carrying out error detection (EDC) checking on the specific booting image; wherein if at least a specific part of a booting image does not pass EDC checking, the code shadowing module shadows error-free parts of the booting image to the XIP memory, carries out EDC checking on at least a duplicate of the specific part, and then shadows an error-free part corresponding to the specific part to the XIP memory.