Boot Engine Shadowing Non-XIP Memory for Error-Free Boot
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Solution Overview
Problem
Booting from non-XIP memory, such as NAND flash, is complex and time-consuming due to the need for error correction and detection, and existing hardware-based methods require intricate ECC hardware, while software methods are slower but simpler.
Innovation Solution
A booting system that uses a boot engine with only error detection (EDC) capabilities, shadowing boot loader and OS images from non-XIP memory to XIP memory, with duplicate images stored across different blocks to reduce error likelihood, and optionally dividing OS images into parts for faster error detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If hardware-based boot engine method is used, then booting time is reduced, but device complexity increases due to complicated ECC hardware
Solution Approach 1:
The patent extracts the ECC (error correction capability) hardware component from the boot engine, retaining only the EDC (error detection capability). This separation eliminates the complex ECC hardware while maintaining the essential error detection function during booting, thus reducing device complexity without significantly impacting booting time performance.
Solution Approach 2:
The patent employs a simplified boot engine with EDC capability instead of full ECC capability. The reduced functionality is acceptable for the temporary booting phase, as the system can handle errors during normal operation through software mechanisms. This approach uses a cheaper, simpler hardware component for a limited-purpose operation.
2Device complexity
If software-based boot method is used, then device complexity is reduced, but booting time increases
Solution Approach 1:
The patent applies partial action by implementing only the essential EDC (error detection) functionality in hardware rather than full ECC (error correction) functionality. This partial hardware implementation provides sufficient error detection capability for booting while avoiding the complexity of full ECC hardware, striking a balance between speed and simplicity.
3Reliability
If ECC capabilities are included in boot engine, then error correction is improved, but device complexity increases
Solution Approach 1:
The patent extracts and removes the ECC (error correction) capability from the boot engine, retaining only the essential EDC (error detection) functionality. This extraction maintains sufficient reliability for booting operations while significantly reducing hardware complexity, as error correction is not required during the temporary booting phase.
Solution Approach 2:
The patent uses a simplified EDC-based boot engine instead of a full ECC-based system. The reduced functionality is acceptable for the temporary booting phase, as the system can handle errors during normal operation through software mechanisms. This approach uses a cheaper, simpler hardware component for a limited-purpose operation.
Data Source
AI summary
A booting system is disclosed for booting from a non-XIP memory utilizing a boot engine that does not have ECC capabilities during booting. The booting system includes: a non-XIP memory for storing a boot loader code and a plurality of operation system (OS) images, wherein the OS images in the non-XIP memory correspond to a same source image; an XIP memory for storing a shadowed boot loader code and OS images; a Central Processing Unit (CPU) for executing the OS images stored in the XIP memory; a code shadowing module for performing error detection checking on the OS images in the non-XIP memory and shadowing the boot loader code and OS images to the XIP memory; and a non-XIP interface for enabling the boot engine to access the non-XIP memory.