Boot Instruction Protection via Address Comparison
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Solution Overview
Problem
Electronic systems, particularly microcontrollers in connected objects, face security risks due to potential modifications of boot instructions, which can compromise the integrity and authenticity of software execution, necessitating enhanced protection mechanisms.
Innovation Solution
A method and system that involve a processing unit and memory with a protection mechanism that compares the storage addresses of instructions with a predefined criterion, triggering a prohibition on executing or accessing boot instructions during application program execution, using hardware circuits to automatically enforce this protection without requiring specific logic instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If boot instructions are made available for execution, then system initialization and startup functions can be performed, but security risks arise from potential unauthorized reuse or modification of these instructions during application program execution
Solution Approach 1:
The patent implements dynamic protection by making boot instructions readable but not executable during application program execution. The system automatically switches the execution state of boot instructions based on the current execution phase, allowing full access during startup while preventing unauthorized execution during application runtime, thus resolving the contradiction between security and adaptability
Solution Approach 2:
The patent changes the execution parameter of boot instructions from executable to non-executable state during application program execution. By modifying the execution permission parameter dynamically based on the system state, the patent prevents unauthorized reuse of boot instructions while maintaining their readability for legitimate purposes
2Reliability
If boot instructions are protected from re-execution, then security is enhanced, but system complexity increases due to additional protection mechanisms
Solution Approach 1:
The patent implements self-service protection where the system automatically manages the execution permission of boot instructions without requiring external intervention. The processor automatically switches between allowing execution during startup and preventing execution during application runtime, reducing the need for complex external protection circuits while maintaining high security
Solution Approach 2:
The patent applies preliminary action by pre-configuring the protection mechanism to automatically activate when application program execution begins. The system prepares the non-executable state for boot instructions in advance, so that when the application starts, the protection is already in place without requiring complex real-time decision-making circuits
3Reliability
If address comparison is performed for each extracted instruction, then precise protection control is achieved, but processing time increases
Solution Approach 1:
The patent applies partial action by performing address comparison only for instructions that require protection, rather than comparing every single instruction. The system selectively compares addresses of boot instructions during application execution, avoiding unnecessary comparison overhead for other instructions, thus achieving precise protection control with minimal time loss
Data Source
AI summary
A system includes a processing unit, a memory configured to store at least one first group of instructions and one second group of instructions for execution by the processing unit, the processing unit being configured to sequentially extract from the memory instructions of the first group and instructions of the second group for their execution. The system also includes a controller including a first auxiliary memory configured to store a protection criterion, a comparator configured to compare the storage address of each extracted instruction with the protection criterion, and a control circuit configured to, in response to the storage address meeting the protection criterion, trigger a protection mechanism including at least one prohibition for the processing unit to execute again at least one portion of the instructions of the first group, during the execution of the instructions of the second group.


