Redundant Boot Memory Structure for Read-Disturbance Errors

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Solution Overview

Problem

NAND flash memory devices face reliability issues due to read disturbance errors, which are often overlooked and can lead to unexplained failures, especially in boot memory where error detection mechanisms are not conventionally applied.

Innovation Solution

A method and system that utilize a data structure with redundant portions of boot information in a secondary boot memory to perform error checks and ensure a valid boot process, even in the presence of read-disturbance errors, by accessing and using valid boot images or maps to avoid bad areas and improve the chances of successful booting without data rewriting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction techniques are applied to address write and radiation-induced errors, then reliability is improved, but read-disturbance errors remain unaddressed and can still cause failures

Engineering Contradiction:
Improvememory reliabilityVSAvoidread-disturbance errors
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by creating redundant copies of boot information (boot images, headers, bad-area maps) in secondary boot memory before read-disturbance errors can occur. These redundant copies are prepared in advance and can be immediately accessed if errors are detected, preventing system failure without requiring complex real-time correction operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by storing multiple redundant copies of boot information in secondary boot memory. Instead of attempting to correct read-disturbance errors in real-time, the system creates backup copies that can be used to restore corrupted data, thereby addressing the harmful effect of read-disturbance errors through redundancy rather than correction.

Inventive Principle:
Principle #26Copying

2Speed

If boot memory is read multiple times during repeated booting, then system responsiveness is improved, but read-disturbance errors increase and can cause boot failure

Engineering Contradiction:
Improveboot speedVSAvoidboot reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements feedback by incorporating error detection mechanisms that monitor the boot information in secondary boot memory. When read-disturbance errors are detected during booting, the system uses the redundant copies to restore corrupted data, allowing repeated booting operations to proceed reliably without degradation of either speed or reliability.

Inventive Principle:
Principle #23Feedback

3Reliability

If redundant data structure is implemented in secondary boot memory, then error detection and mitigation capability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmemory structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the boot information into distinct components (boot images, headers, bad-area maps) and storing redundant copies of each in secondary boot memory. This segmented approach to redundancy allows for more efficient error detection and restoration, as only the specific corrupted segments need to be replaced rather than the entire boot structure, thereby managing complexity through organized modularity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20090138754A1Memory Errors
Publication Date: 2009.05.28 ICERA INC
  • US20090138754A1 patent drawing
  • US20090138754A1 patent drawing
  • US20090138754A1 patent drawing

AI summary

The present invention provides a method of protecting against errors in a boot memory, the method comprising initiating booting of a processor by executing primary boot code from a primary boot memory, and based on the execution of the primary boot code: accessing a data structure comprising a plurality of redundant portions of boot information stored on a secondary boot memory; performing an error check on a plurality of the portions to determine whether those portions contain errors and, based on the error checks, to identify a valid portion; and booting the processor using the valid portion of boot information.