Boot Region Table for Dynamic Read Speed Optimization

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Solution Overview

Problem

Conventional boot processes are inefficient due to the need to load large lists of logical block addresses (LBAs) multiple times, and preconfiguring pinned regions assumes sequential reads, which does not align with the semi-random nature of actual boot up data access.

Innovation Solution

A dynamically updated boot region table is created by tracing read requests during the boot process, capturing sequences and lengths, allowing for preloading data in a predicted sequence, making random reads appear sequential and improving read speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large lists of logical block addresses are loaded multiple times during boot process, then all necessary data can be accessed, but boot time increases significantly

Engineering Contradiction:
Improvedata access completenessVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent preloads data into a cache memory before the actual boot process begins. By anticipating and preloading the necessary data blocks during system initialization or idle periods, the system avoids the need to load large lists of logical block addresses multiple times during boot, thereby reducing boot time while ensuring all necessary data is available.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a dynamic caching strategy where the cache content is adaptively updated based on actual read patterns observed during boot operations. The system dynamically identifies frequently accessed or sequentially accessed blocks and prioritizes their loading into cache, optimizing the balance between data access completeness and boot speed based on runtime behavior.

Inventive Principle:
Principle #15Dynamics

2Productivity

If pinned regions are preconfigured assuming sequential reads, then read operations can be optimized, but the assumption does not align with semi-random access patterns in actual boot up

Engineering Contradiction:
Improveread operation efficiencyVSAvoidaccess pattern flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent transitions from static preconfigured pinned regions to a dynamic caching mechanism that adapts to actual access patterns. The system monitors read requests during boot operations and dynamically updates the cache to reflect observed sequential and semi-random access patterns, thereby maintaining read operation efficiency while adapting to the true nature of boot time data access.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback from actual read operations to refine and update the cache content. By monitoring which blocks are actually accessed during boot and how they are accessed (sequentially or randomly), the system adjusts its caching strategy accordingly, ensuring that pinned regions or cache entries are optimized based on real-world usage rather than assumptions.

Inventive Principle:
Principle #23Feedback

3Speed

If data is preloaded in predicted sequence making random reads appear sequential, then read speed improves, but the system must accurately predict access patterns

Engineering Contradiction:
Improveread speedVSAvoidaccess pattern prediction accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent employs a strategy of loading slightly more data into the cache than strictly necessary, or loading data with a degree of redundancy. By preloading additional potential candidate blocks alongside the predicted sequential access blocks, the system ensures that even if prediction accuracy is not perfect, the necessary data is still available in cache, thereby maintaining high read speed without requiring perfect prediction accuracy.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements a dynamic refinement process where the prediction accuracy improves over time as the system observes actual access patterns. The caching strategy starts with predicted sequences but continuously adapts based on observed read behavior, allowing the system to achieve high read speeds even with initially imperfect predictions by learning and adjusting to the actual semi-random access patterns of the boot process.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240281259A1Dynamically updating a boot region table to increase read speed during boot up
Publication Date: 2024.08.22 MICRON TECHNOLOGY INC
  • US20240281259A1 patent drawing
  • US20240281259A1 patent drawing
  • US20240281259A1 patent drawing

AI summary

A method includes receiving a first read request during a first boot time. The first read request includes a logical block address and a length. The method also includes tracing the first read request. The method further includes creating a table using the traced first read request. The table includes a sequential record of each traced read request received during the first boot time. The method further includes transmitting the table to a host system during a second boot time. The method further includes receiving a second read request during the second boot time. The second read request includes a logical to physical representation obtained using the table and the logical block address.