Boot-Up Read Patterning for Faster Memory Power-Up Reads
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Solution Overview
Problem
Memory devices experience high error rates during power up due to transitions from transient to stable states, leading to costly and time-consuming read error handling operations, which can result in host system timeouts.
Innovation Solution
Implementing a boot-up read pattern data structure that proactively performs a dummy read using a pattern likely to be used during power up, transitioning memory cells from stable to transient states to reduce error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read error handling operations are performed during power up to ensure data accuracy, then reliability is improved, but time consumption increases causing host system timeouts
Solution Approach 1:
The patent performs a preliminary dummy read operation during power up using a specific read pattern before normal read operations. This preliminary action transitions memory cells from stable state to transient state in advance, ensuring that subsequent reads during the critical power up period will have lower error rates, thereby reducing the need for error handling retries and decreasing overall power up time.
2Reliability
If dummy read operations are performed to transition memory cells to transient states, then error rates are reduced, but additional operations increase time consumption
Solution Approach 1:
The patent changes the read pattern parameter during power up to a specific dummy read pattern that is optimized for transitioning memory cells from stable to transient states. By modifying this operational parameter, the system achieves faster state transition and reduced error rates without requiring excessive additional time, as the dummy read pattern is designed to be executed efficiently.
3Reliability
If read error handling operations are performed to ensure data integrity, then data integrity is improved, but productivity decreases due to repeated operations
Solution Approach 1:
The patent executes a preliminary dummy read operation during power up that proactively transitions memory cells to the transient state, preventing read errors before they occur. This preliminary action eliminates the need for subsequent error handling operations and retries, thereby maintaining data integrity while significantly improving read operation efficiency during the critical power up period.
Data Source
AI summary
A boot-up read pattern data structure is maintained. Each entry of the boot-up read pattern data structure comprises a boot-up read pattern associated with a respective power cycle event and a dummy boot-up read pattern flag. The dummy boot-up read pattern flag indicates that the boot-up read pattern has been consecutively used during boot-up. Storing, in a new entry of the boot-up read pattern data structure, a current boot-up read pattern associated with a respective power cycle event for each power cycle event. The current boot-up read pattern with a previous boot-up read pattern associated with a latest entry of the boot-up pattern data structure is compared. A dummy boot-up read pattern flag of the new entry is updated responsive to the comparing the current boot-up read pattern and the previous boot-up read pattern.