Bootable Volatile Memory Device for Fast Boot Procedure
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Solution Overview
Problem
The existing boot procedures in processing systems face a performance bottleneck due to the longer access time required for nonvolatile memory, which necessitates accessing it before volatile memory, despite volatile memory being used for data operations during booting.
Innovation Solution
A bootable volatile memory device with a dedicated boot code area and chip select terminals allows a processor to access and store bootstrap code within volatile memory, enabling faster boot procedures by using a common interface protocol like LPDDR2, and a control unit manages the transfer of bootstrap code from nonvolatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the processor accesses nonvolatile memory to read bootstrap code before accessing volatile memory, then the system can perform the boot procedure, but the boot procedure becomes slow due to the longer access time of nonvolatile memory
Solution Approach 1:
The patent applies preliminary action by pre-copying the bootstrap code from nonvolatile memory to volatile memory before the actual boot procedure begins. The control unit transfers the bootstrap code to a designated region in volatile memory during system initialization or manufacturing, so that when the processor needs to execute the boot procedure, it can directly access the already-present code in volatile memory without waiting for slower nonvolatile memory access.
2Ease of operation
If the system uses volatile memory for data operations during booting, then data write and read operations can be performed, but the bootstrap code cannot be stored in volatile memory
Solution Approach 1:
The patent applies segmentation by dividing the volatile memory into distinct functional regions: a boot code storage region for holding the bootstrap code and a data operation region for normal volatile memory operations. This segmentation allows the volatile memory to simultaneously serve both purposes - storing the bootstrap code for reliable execution and performing fast data read/write operations - without interfering with each other's functionality.
3Speed
If the processor directly accesses volatile memory for booting, then the boot procedure speed improves, but the system lacks a mechanism to select between different memory access modes
Solution Approach 1:
The patent introduces intermediary elements - specifically, a control unit and chip select signal terminals - that mediate between the processor and the volatile memory. The control unit manages the transfer of bootstrap code and generates appropriate chip select signals to indicate whether the processor should access the boot code region or the data region of the volatile memory. This intermediary management layer enables fast direct volatile memory access while providing the necessary control mechanisms for mode selection.
Data Source
AI summary
A bootable volatile memory device comprises a volatile memory area configured to be written to and read from by a host processor, a boot code area configured to store bootstrap code before a boot procedure is performed by the host processor, a first chip select terminal configured to output a signal used as a chip select signal where the host processor performs the boot procedure by reading the bootstrap code from the boot code area, and a second chip select terminal configured to output a signal used as a chip select signal where the host processor writes and reads data to and from the volatile memory area.