Bootstrap Cascode Circuit for Active GaN MOSFET Turn-Off Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Cascoded semiconductor devices face issues such as dynamic avalanche, limited switching speed adjustability, increased output capacitance, lack of reverse device operation, and risk of gate isolation breakdown in power conversion applications due to their design limitations.

Innovation Solution

A cascode transistor circuit with a bootstrap arrangement, comprising a gallium nitride or silicon carbide FET and a silicon MOSFET, a bootstrap capacitor, and a diode, allowing active control of both power switches using a single gate driver, which includes a diode to charge the capacitor and generate a negative voltage at the gate of the FET during turn-off, enabling improved control and reduced voltage peaks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a standard cascode configuration is used with indirect control of the GaN switch, then the device can be controlled using conventional low-voltage silicon MOSFET gate drivers, but the switching speed (dv/dt and di/dt) becomes barely adjustable and dynamic avalanche occurs during turn-off

Engineering Contradiction:
Improvecompatibility with standard gate driversVSAvoiddynamic avalanche reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces a bootstrap circuit as an intermediary control mechanism between the gate driver and the cascode switches. The bootstrap capacitor stores energy and the diode provides unidirectional current flow, enabling the gate driver to actively control both the silicon MOSFET and GaN HEMT gates independently. This intermediary circuit allows standard gate drivers to be used while providing active control capability to prevent dynamic avalanche.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If additional layers are introduced in the GaN power semiconductor to make the device normally-off, then the device can be used in power conversion applications, but device performance penalties occur

Engineering Contradiction:
Improvenormally-off capabilityVSAvoiddevice performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the normally-off functionality from the power switching function by using a cascode configuration with two separate devices: a GaN HEMT for high-voltage power switching and a silicon MOSFET for control. This segmentation allows the GaN device to maintain its superior performance characteristics while the silicon MOSFET provides the normally-off capability through independent gate control.

Inventive Principle:
Principle #1Segmentation

3Power

If a cascode configuration is used to combine GaN and silicon MOSFET advantages, then high-voltage switching capability is achieved, but output capacitance C OSS increases compared to a single normally-on switch

Engineering Contradiction:
Improvehigh-voltage switching capabilityVSAvoidoutput capacitance
Core Design Contradiction:
PowerVSQuantity of substance

Solution Approach 1:

The patent employs dynamic control of both switches in the cascode configuration through the bootstrap circuit. By actively controlling the timing and state of both the silicon MOSFET and GaN HEMT, the circuit optimizes the effective output capacitance during switching transitions. The dynamic control allows the system to achieve high-voltage capability while minimizing the impact of increased output capacitance through coordinated switch operation.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution addresses dynamic avalanche, enhances switching speed controllability, reduces output capacitance, enables reverse device operation, and prevents gate isolation breakdown, making the cascode transistor circuit more reliable and efficient for power conversion applications.

Implementation Method 1

a bootstrap capacitor connected between the gates of the gallium nitride or silicon carbide FET and the silicon MOSFET

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a diode with its anode directly connected to the gate of the gallium nitride or silicon carbide FET and its cathode directly connected to the low power rail

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentEP2693639B1Cascoded semiconductor devices
Publication Date: 2015.09.09 NXP BV
  • EP2693639B1 patent drawingFigure 1~2
  • EP2693639B1 patent drawingFigure 3~4

AI summary

A cascoded power semiconductor circuit is provided for power switches based on depletion-mode (normally on) devices. The control circuit makes use of a bootstrap arrangement that allows an active control of both power switches of a cascode circuit using a single gate driver.